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OMAP-L138 Jitter on Interrupts

Wolfgang Pfeffer
Prodigy 20 points
Other Parts Discussed in Thread: OMAP-L138

Hello,
I use the OMAP-L138 and have the following problem:

I have a program running on the ARM side of the OMAP, nothing on the DSP.
I have one timer continuously running. Every 1ms it produces an interrupt. In the interrupt routine I let a port toggle.
The output signal is controlled with an oszi. If there is only this interrupt, everything is ok.

Now I add another interrupt. This one is controlled by the ecap1 and occures all 10-15ms. It has a lower priority than the timer interrupt.
I also use interrupt nesting and the ecap interrupt can be interrupted by the timer interrupt. I checked this, it works.

The problem is, that i have a jitter on the timer interrupt of about 5µs (triggered on rising edge there is a jitter on the falling edge) when the system has to handle both interrupts.
Curiously it happens not every time. There might be nearly no jitter when I start the system, but when I start it again the jitter occurs.

Hope someone has an idea what's going wrong.

Best regards,

Wolfgang

  • 0
    TI__Expert 4760 points

    Wolfgana,

    Are you using standard OMAP-L138 EVM or this is your own design ? How do you measure the Jitter ( that i have a jitter on the timer interrupt of about 5µs) and concluded that it's occurring randomly.

    Hope you've checked the input clock source and PLL's are configured properly.Have you checked the AUXCLK output?

    Regards

    Antony 

  • 0 in reply to Antony Samsunil
    Prodigy 20 points

    Hi Antony,

    thanks for the feedback.

    We are using our own design and work on it since more than two years.
    Up to now the jitter was no problem for us but we want to modify some things and now the timing should be better.

    For measuring of the jitter I use an oscilloscope. I trigger on the rising edge and check the falling edge of a port.
    As described above the port is toggled inside the timer interrupt routine every 1ms.

    The time between rising and falling therefore should also be 1ms but sometimes I can see the described jitter.


    Regards

    Wolfgang

  • 0 in reply to Wolfgang Pfeffer
    Guru 26430 points

    Sounds like interrupts are not nested. The lower priority interrupt handler might disable other interrupts until it is done. Effectively delays the higher priority interrupt from being serviced. Some discussion here:

    http://e2e.ti.com/support/embedded/starterware/f/790/t/247878.aspx

  • 0 in reply to Norman Wong
    TI__Expert 4760 points

    Hello,

    Have you been resolved this issue?

    Regards

    Antony