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PORZ and VRTC Power domain

Other Parts Discussed in Thread: AM3352

hello,

i have a customize project based on AM3352. i have some questions concerning the RTC and PORZ signals on EVM (starterkit TMDSSK3358) :

1- why you use an external LDO for sourcing the VRTC and not from the PMIC TPS65910A3 ?

2- why there is two AND gates for the RTC_PORZ and PORZ signals on the first version of EVM3358 ? why the second is removed for the PORZ ?

3- if we plan to use the RTC (for saving Date and Time application ) ? how can we keep power for the VRTC using the external LDO ? can we use the vbackup of the PMIC ?

best regards,

  • Hi Mokh,
     
    1. An external LDO for VRTC is used on the SK, because the TPS65910A3 PMIC's internal VRTC LDO goes into low-power mode when the PMIC is in OFF mode, and cannot provide enough current for the AM335X. If you want to avoid using this additional LDO you have to use TPS65910A31. This is described in the document http://www.ti.com/lit/ug/swcu093b/swcu093b.pdf.
     
    2. I'm not sure which gates you are talking about. EVM or Starter Kit? Which revisions? Can you give the part designators?
     
    3. PMIC VBACKUP feeds only the PMIC RTC. You can use it also for timekeeping.
  • Hi Biser,

    Thanks first for your reply.

    2-  on EVM rev1.4A : the gates ares U6, U3 and U1. On the starterKit : only U19. what is the difference between the two design ? please advise

    3-  for timekeeping application, what's the suitable solution for AM3352:

          a) PMIC with OSC 32Khz

          b) external LDO for VRTC with coin cell or supercap .

    or if there is a bug on RTC circuit fo AM335x according to Errata we should then :  

        c) use external RTC circuit

    regards,

  • Hi Mokh,
     
    2. The reason for this difference is that before final verification the PWRONRSTn input was specified to comply only with VDDSH6 signal levels. At present it's been verified that PWRONRSTn high-level treshold is 1.35V. The EVM 1.4A schematics does not reflect this - U33 and U3 are in fact unnecessary and PMIC_RESETOUTn can be directly connected to PWRONRSTn.
     
    3.a. This is a good solution but you would need to write some code for updating the AM335X RTC via I2C from PMIC.
    3.b. The Errata is fixed for silicon Rev.2.X, but there is still no data for current consumption of the internal RTC.
    3.c. This is probablt the best solution regarding backup battery life (coin cell can last for years). Drawbacks are extra cost for additional RTC plus you would again need to write some code as in 3.a.
  • so the VIH for the PWRONRSTn is always 1.35V and we can use this even for silicon rev 1.0 ?

  • Yes, VIH is 1.35 V minimum for VDDSHV6 = 1.8 V or 3.3 V all silicon revisions.

    Regards,
    Paul