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how to set gigabit PHY in the uboot

Hi 

i'm using dm816x custom B/D. 

we are using ICPLUS's ip1001  phy(http://www.alldatasheet.co.kr/datasheet-pdf/pdf_kor/218736/ETC2/IP1001-DS-R06.html)

when i test gigabit hub custom b/d network does not working .  

thus i coded according the the official guidelines that how to add a custom ethernet PHY(http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/717/t/128095.aspx)

but it's not working. 

i coded following sequence.

  1. Enable EMAC (so we can write to PHY registers via EMAC MDIO)

  2. Disable PHY auto-negotiation and set it manually to 100 Mbit/s full duplex (EMAC_TXCLK gets the clock)

  3. Restart EMAC so it gets reinitialized while the clock is running

and finally i test by ping command after boot up. 

i disabled phy autonego and set 100M Full duplex .a

i checked phy EMAX_TXCLK output clock , 25Mh clock is outputed in the uboot,  but atfer kernel boot there's nothing  .

how can i workemac chip?

 

and i modified  the kernel driver dananci_ema.c

static void eamc_set_phy_config(...)

{

...

#ifdef CONFIG_MACH_UD8168_DVR

if( phy->phy_id == 0x001CC914) || (phy->phy_id == 0x2430D91) ) {

    /* raltek 8211DG and IP1001 specific: */

    val &= ~BIT(9);

}

}






  • Hello,

    Are you using EZSDK 5.05.02.00 ?

    You can check the below wiki:

    http://processors.wiki.ti.com/index.php/TI81xx_PSP_Porting_Guide#Ethernet_Driver_-_Adding_Custom_Ethernet_Phy

    Also check DM816x errata (SPRZ329D) :

    Advisory 2.1.18 — CPGMAC 1-Gbps Mode Does Not Work When EMAC_TXCLK is Not Running

    Regards,

    Pavel

  • Hi,

    we also try to use IC+ IP1001 in Gigabit mode.

    We do not need Gigabit mode in U-Boot, but Linux-Kerel must support this feature.

    I have 2 questions:

    1. If we do the workaround  from Advisory 2.1.18  (enabling TX_CLK) in U-Boot, does Gigabit mode also work in Linux ?

      It seems that the Phy gets a soft-reset, and a new initialization is done.

    2. For me it is not clear how to integrate the workaround in Linux, a fixup seems not to be the righr place?

    BR  Holger

     

  • Hi Holger,

    The DM816x Linux driver support 1000 Mbps (Gigabit) mode:

    Can you provide me full console log? Do you connect your DM816x board directly to 1Gbit NIC or there is switch/hub/router between?

    Holger Eberhard102906 said:

    1. If we do the workaround  from Advisory 2.1.18  (enabling TX_CLK) in U-Boot, does Gigabit mode also work in Linux ?

      It seems that the Phy gets a soft-reset, and a new initialization is done.

    Yes, I think new init is done.

    Holger Eberhard102906 said:
    2. For me it is not clear how to integrate the workaround in Linux, a fixup seems not to be the righr place?

    This is done in the EMAC MDIO driver.


    Regards,
    Pavel

  • Hi Pavel,

    I forgot to tell that we use Eth0 in 100 MBit mode in u-boot, and we want to use Eth1 from Linux
    in Gigabit mode. Eth0 is still used in 100 MBit mode from Linux.

    I try to find a way to initalize davinci_emac and ICPLUS  IC1001 in Linux. The Problem is that IP1001 does not provide TX_CLK in Gigabit mode.

    BR Holger

  • Holger Eberhard102906 said:
      It seems that the Phy gets a soft-reset, and a new initialization is done.

    Seems this is done in linux-kernel/drivers/net/davinci_emac.c

    emac_dev_open() -> emac_hw_enable -> EMAC_SOFTRESET 0x4A100174

    Regards,
    Pavel

  • Hi Pavel,

    yes, emac_hw_enable() this seems to be a proper place, we try.

    Thanks and BR Holger

  • Holger Eberhard102906 said:

    I forgot to tell that we use Eth0 in 100 MBit mode in u-boot, and we want to use Eth1 from Linux
    in Gigabit mode. Eth0 is still used in 100 MBit mode from Linux.

    I try to find a way to initalize davinci_emac and ICPLUS  IC1001 in Linux. The Problem is that IP1001 does not provide TX_CLK in Gigabit mode.

    Have you tried with gigabit_en = 0 for emac1 and gigabit_en = 1 for emac2 in   linux-kernel/arch/arm/mach-omap2/devices.c ?

    We have some code in u-boot/drivers/net/davinci_emac.c

    #ifdef DAVINCI_EMAC_GIG_ENABLE
        /* Enable PHY to clock out TX_CLK */
        davinci_eth_phy_read(active_phy_addr, PHY_CONF_REG, &tmp);
        tmp |= PHY_CONF_TXCLKEN;
        davinci_eth_phy_write(active_phy_addr, PHY_CONF_REG, tmp);
        davinci_eth_phy_read(active_phy_addr, PHY_CONF_REG, &tmp);
    #endif

    TXCLK is not required after initialization, but must be present during initial release of the EMAC module from reset.

    The two work-arounds in errata are to either use a PHY that allows the TXCLK to be driven during 1000 Mbps mode, or to wait until after the EMAC module has started and then switch to 1000 Mbps mode.

    See the below e2e threads which are related:

    Regards,
    Pavel