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McBSP FPER and FSG

Jama Mohamed
Intellectual 280 points

Hello,

So I have configured my McBSP for 16-bit SPI (0,0) and have set FSG and FPER to the lowest possible value (0 or 1). I am wondering what these registers do with my current configuration? My 'frame sync' is actually my /CS signal, that that doesn't have a specific syncing period...

  • 0
    TI__Genius 14965 points

    Hi,

    When the McBSP is configured as described for SPI-master operation, the bit

    fields for frame-sync pulse width (FWID) and frame-sync period (FPER) are
    overridden, and custom frame-sync waveforms are not allowed. FSG is effective at McBSP mode.

    Regards,

    Hyun