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C6657 MSI Interrupt with released version

Dhar Kurban
Intellectual 960 points


Hi,

I am having a problem with generating MSI interrupts from a C6657 released version in EP mode.

The same software works fine with a Beta version of the C6657 eval board.

Here's how the addresses/offsets are configured:

RC configures

msiLo32 = 0xEFE41740

msiUp32 = 0

msiData = 0

EP configures

obSize.size = 1

obOffsetLo.enable = 1

obOffsetlo.offsetLo = EFE

EP writes msiData value (0) to address 0x60041740

With the beta eval board this generates an interrupt on the RC, with the released version it does not.

Please let me know what's different.

Thanks

Dhar

  • 0
    TI__Genius 12065 points

    Dhar,

    The software will read the data from the MSI registers and provide them to EP for the outbound write to RC based on the new values every time, is it correct?

    The MSI registers in EP are assigned by RC during the enumeration, which might be different each time. So we should not use any fixed values.

    And MSI_EN field should be set to 1 in MSI_CAP register in EP in both cases (beta version and released version), is it correct?

    Are you using the same RC and PCIe driver in both cases (beta version and released version) as well?

    Could you check the RC side to see if it receives the MSI interrupt from EP please?

    I am not sure if RC is C6657 as well, but it may have similar MSI interrupt status registers such as MSIn_IRQ_STATUS in C6657 to indicate if it receives the interrupt or not.

  • 0 in reply to Steven Ji
    Intellectual 960 points

    Steven Ji said:

    The software will read the data from the MSI registers and provide them to EP for the outbound write to RC based on the new values every time, is it correct?

    The RC sets the values once before loading and starting the EP, these values never change.

    Steven Ji said:

    The MSI registers in EP are assigned by RC during the enumeration, which might be different each time. So we should not use any fixed values.

    In our case the values never change.

    Steven Ji said:

    And MSI_EN field should be set to 1 in MSI_CAP register in EP in both cases (beta version and released version), is it correct?

    Are you using the same RC and PCIe driver in both cases (beta version and released version) as well?

    Yes, this field is set in both cases.

    The same software is used in both cases.

    The same RC and software is used in both cases.

    The only change is which C6657 eval board we use.

    Steven Ji said:

    Could you check the RC side to see if it receives the MSI interrupt from EP please?

    I am not sure if RC is C6657 as well, but it may have similar MSI interrupt status registers such as MSIn_IRQ_STATUS in C6657 to indicate if it receives the interrupt or not.

    The RC does not receive anything when the release version of the C6657 eval card is used. In fact nothing is transferred into any of the outbound addresses when the released version of the C6657 eval board is used. It's as if Outbound translation doesn't work.

    Thanks

    Dhar

  • 0 in reply to Dhar Kurban
    TI__Genius 12065 points

    Dhar,

    For the first two questions, I think we are talking about the same thing. The MSI data/address values in EP (assigned by RC) should be fixed after the enumeration (after starting EP).

    What I am trying to confirm is if the software will use the values in the EP registers instead of use any hard-coded values.

    For the outbound transfer, I think the "OB_XLT_EN" bit is set in CMD_STATUS register of EP, which will enable the outbound transfer and the link is up and stable (LTSSM_STATE=0x11 in DEBUG0), is it correct?

    Besides the interrupt, are you able to test if the outbound memory transactions working from EP to RC please? 

    And are you running any boot code in EP (c6657) please? Probably you could dump the PCIe registers (starting from 0x21800000) in both cases and compare to see if any difference in the setup on EP side.

  • 0 in reply to Steven Ji
    Intellectual 960 points

    Hi

    It appears OB_XLT_EN is enabled by default on the beta board and disabled by default on the production board. Since we were relying on the default and not setting this bit, the beta board worked and the production board failed.

    When this bit is forced on the systems functions correctly.

    Thanks for your help.

    Dhar