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TIMI0 internally pulled down?

fearghal rudden
Intellectual 480 points

Hi,

I have a development board with pin L24 (TIMI0) of the C6678 DSP pulled to GND via a 4K7 ohm resistor. When I look in the DEVSTAT register i can see that bit 16 is 0 as expected. However, when I remove this resistor and power up my board again, the DEVSTAT register now has bit 16 set to 1. I do not have a signal driving the TIMI0 pin on my design.

Is this pin supposed to be internally pulled down? I am planning a redesign and had hoped to change this resistor to pull up, allowing the IPD resistor to set the PCIESSEN bit to 0 but this does not seem to happen. I know the EVM board also ties this pin to GND, so is it a mistake in the datasheet? Or is it just the the IPD/U resistors of the DSP should not be relied upon as you say in the datasheet?

Rgds,

Fearghal

  • 0
    TI__Mastermind 42545 points

    Hi Fearghal,

    The documentation shows that TIMI0 has an internal pull down resistor.  These are very weak pulling resistors designed to keep the LVCMOS signals in a steady state when nothing else is attached to the pin.  If you have any circuit or trace attached to an LVCMOS signal we always recommend including an external pulling resistor.  If the pin is used for configuration of the part we strongly recommend that an external pulling resistor is present to be sure that the value needed for configuration is correct at the time that reset is released. I would recommend that you don't rely on the internal pull down for the TIMI0 pin.

    Regards, Bill

  • 0 in reply to Bill Taboada
    Intellectual 480 points

    Thanks Bill,

    I'll make sure to include user selectable external pull-ups and pull-downs on all the TIMI and GPIO signals

    Rgds,

    Fearghal