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IPC Interrupt Generation Registers

asimburak1984
Intellectual 515 points


Hello,

I am trying to understand the device specific configuration registers in a C6670. Regarding this, in the data manual "SPRS689D" or in the document "SPRUGW4A" about chip interrupt controller, for the IPC interrupt generation register IPCGRx, through the fields SRCS(4-31) 28 different sources of interrupts can be identified.  I've looked through several docs and I couldn't find any table with these 28 different sources. Are the SRCS fields anyway accessible by the user? Further if I look at the CSL IPC function

CSL_IDEF_INLINE void CSL_IPC_genGEMInterrupt ( Uint32  index,
Uint32  srcId  
)

there is this argument srcId, which can be set to 2 if core 2 shall trigger the interrupt. According to the value of this argument, then the SRCS bit fields are set. What is the relation of this source ID parameter to the "28 different sources of interrupt" ?

Thank you in advance!

Burak

  • 0
    TI__Intellectual 1585 points

    Hey Burak, 

    So the Source IDs of these interrupts is what you assign to the interrupt vector in CCS. You assign a number to an interrupt, and when that goes high, it creates that interrupt. (More explained on that here: http://processors.wiki.ti.com/images/d/d6/Swis.pdf ). There really isn't a limit to what 28 different types of places, it means it only has 28 spots of what can be sent for an interrupt in the vector. 

    Look at some of the links I have included below. This may help you with the interrupts. They may answer some of your future questions. 

    Here are some links that involve interrupts that might help you: 

    http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/p/193417/692955.aspx#692955

    http://processors.wiki.ti.com/index.php/Setting_up_interrupts_in_DSP_BIOS

    http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/p/237823/833203.aspx#833203

    Good Luck!

    -Kat Kelsch 

  • 0 in reply to Katherine Kelsch
    Intellectual 515 points

    Hello Kat,

    thanks for your reply! Regarding the links, I am already familiar with assigning events (0-127 on C6670) to the available INTs (4-15) with BIOS and without BIOS. This is actually what confused me when I read about the IPCGRx Registers with the statement "These registers also provide a Source ID facility by which up to 28 different sources of interrupts can be identified." from SPRS689D. So my question again, what is the purpose of these SOURCE ID bit fields? Are there any other sources possible other than the cores to trigger the IPC LOCAL interrupt?

    Regards

    Burak

  • 0 in reply to asimburak1984
    Guru 10750 points

    Hello Burak,

    IPCGRx SRC0..27 are user defined which means that you can signal the core that gets the interrupt who creates the interrupt or you can play with the bits to send a simple msg to the core so it's you to decide what/how to set this bits,

    Thanks,

    HR

  • 0 in reply to HRi
    Intellectual 515 points

    Hello HR,

    thank you for your answer. So to make it clear with an exmaple:

    Bit combination 1 ( 0............01 ) shall trigger function 1;

    Bit combination 2 (0.............10) shall trigger function 2;

    And so on. As a result we can associate 2^27 possible actions when the IPC Interrupt is set. Is my understanding correct?

    Best Regards

    Burak

  • 0 in reply to asimburak1984
    Guru 10750 points

    Hello Burak,

    Yes, you can do this as-well, so in your IPC Interrupt function you will call a Function according to the 28 bits or you can have the first bits stating which core sent the message and than call function according to the rest of the bits,

    Thanks,

    HR

  • 0 in reply to HRi
    Intellectual 515 points

    Thank you for your answers!

    BR

    Burak