Hello,
I'm trying to read an SD card with my OMAP L138 eXperimenter Kit, so I've followed the OMAP-L138 DSP+ARM Processor Technical Reference Manual (SPRUH77A), and first try to identify the card connected to the board. It is explained with command to send and when to expect an answer, but I simply never communicate, I have monitored the sd0_clk and sd0_cmd pin of the board with an oscilloscope and I was able to set the clock, but there is simply nothing on the cmd pin. So my question is after setting witch command to send is there a special instruction to trigger the sending of the command ?
Here is the code of my two function is something missing to be at least able to send the commands for the identification process ?
/* * bootloader_omapL138_SDCard.c * * Created on: Mar 26, 2013 * Author: Omap */ #include "..\OMAPL138_common.h" #include "bootloader_omapL138_SDCard.h" #include <pspiom/cslr/cslr_mmcsd.h> void SDCardInit(void) { // Open Permissions to SYSCFG Registers _call_swi(ARM_PRIV_MODE_KEY); CSL_FINS(sysRegs->KICK0R, SYSCFG_KICK0R_KICK0, KICK0_KEY); CSL_FINS(sysRegs->KICK1R, SYSCFG_KICK1R_KICK1, KICK1_KEY); CSL_FINST(sysRegs->PINMUX11, SYSCFG_PINMUX11_PINMUX11_7_4, MMCSD0_DAT7); CSL_FINST(sysRegs->PINMUX11, SYSCFG_PINMUX11_PINMUX11_3_0, MMCSD0_DAT6); CSL_FINST(sysRegs->PINMUX10, SYSCFG_PINMUX10_PINMUX10_31_28, MMCSD0_DAT5); CSL_FINST(sysRegs->PINMUX10, SYSCFG_PINMUX10_PINMUX10_27_24, MMCSD0_DAT4); CSL_FINST(sysRegs->PINMUX10, SYSCFG_PINMUX10_PINMUX10_23_20, MMCSD0_DAT3); CSL_FINST(sysRegs->PINMUX10, SYSCFG_PINMUX10_PINMUX10_19_16, MMCSD0_DAT2); CSL_FINST(sysRegs->PINMUX10, SYSCFG_PINMUX10_PINMUX10_15_12, MMCSD0_DAT1); CSL_FINST(sysRegs->PINMUX10, SYSCFG_PINMUX10_PINMUX10_11_8, MMCSD0_DAT0); CSL_FINST(sysRegs->PINMUX10, SYSCFG_PINMUX10_PINMUX10_7_4, MMCSD0_CMD); CSL_FINST(sysRegs->PINMUX10, SYSCFG_PINMUX10_PINMUX10_3_0, MMCSD0_CLK); // Enable power for DDR2/mDDR controler // 1. Wait for the GOSTAT[x] bit in PTSTAT to clear to 0. You must wait for any // previously initiated transitions to finish before initiating a new transition. while (CSL_FEXT(psc0Regs->PTSTAT, PSC_PTSTAT_GOSTAT0) != 0) { ; } // 2. Set the NEXT bit in MDCTLn to SwRstDisable (0), SyncReset (1), Disable (2h), // Enable (3h), Auto Sleep (4h) or Auto Wake (5h). CSL_FINST(psc0Regs->MDCTL[CSL_PSC_MMCSD0], PSC_MDCTL_NEXT, ENABLE); // 3. Set the GO[x] bit in PTCMD to 1 to initiate the transition(s). CSL_FINST(psc0Regs->PTCMD, PSC_PTCMD_GO0, SET); // 4. Wait for the GOSTAT[x] bit in PTSTAT to clear to 0. The modules are safely // in the new states only after the GOSTAT[x] bit in PTSTAT is cleared to 0. while (CSL_FEXT(psc0Regs->PTSTAT, PSC_PTSTAT_GOSTAT0) != 0) { ; } // 1. Place the MMC/SD controller in its reset state by setting the CMDRST bit // and DATRST bit in the MMC control register (MMCCTL). You can set other bits // in MMCCTL after reset. CSL_FINST(mmcsd0Regs->MMCCTL, MMCSD_MMCCTL_CMDRST, DISABLE); CSL_FINST(mmcsd0Regs->MMCCTL, MMCSD_MMCCTL_DATRST, DISABLE); // if an SD card is connected, specify a 4-bit data bus (WIDTH = 1 in MMCCTL). CSL_FINST(mmcsd0Regs->MMCCTL, MMCSD_MMCCTL_WIDTH0, 4BIT); // 2. Write the required values to other registers to complete the MMC/SD // controller configuration. // A clock divider in the MMC/SD controller divides-down the function clock to // produce the memory clock. Load the divide-down value into the CLKRT bits in // the MMC memory clock control register (MMCCLK). // The divide-down value is determined by the following equation: // when DIV4 = 0 in MMCCLK: // memory clock frequency = function clock frequency/(2 � (CLKRT + 1)) // when DIV4 = 1 in MMCCLK: // memory clock frequency = function clock frequency/(4 � (CLKRT + 1)) // // The CLKEN bit in MMCCLK determines whether the memory clock appears on the // MMCSD_CLK pin. If you clear the CLKEN to 0, the memory clock is not provided // except when required. // The function clock frequency will be 150Mhz and the memory clock frequency has to be // 400 KHz or less during the initialization. // CLKRT = 187 = 0xBB CSL_FINS(mmcsd0Regs->MMCCLK, MMCSD_MMCCLK_CLKRT, 0xBB); // In doubt set timouts to maximums CSL_FINS(mmcsd0Regs->MMCTOR, MMCSD_MMCTOR_TOR, 0xFF); CSL_FINS(mmcsd0Regs->MMCTOR, MMCSD_MMCTOR_TOD_25_16, 0x3FF); CSL_FINS(mmcsd0Regs->MMCTOD, MMCSD_MMCTOD_TOD_15_0, 0xFFFF); // 3. Clear the CMDRST bit and the DATRST bit in MMCCTL to release the MMC/SD // controller from its reset state. It is recommended not to rewrite the values // that are written to the other bits of MMCCTL in . CSL_FINST(mmcsd0Regs->MMCCTL, MMCSD_MMCCTL_CMDRST, ENABLE); CSL_FINST(mmcsd0Regs->MMCCTL, MMCSD_MMCCTL_DATRST, ENABLE); // 4. Enable the MMCSD_CLK pin so that the memory clock is sent to the memory // card by setting the CLKEN bit in the MMC memory clock control register (MMCCLK). CSL_FINST(mmcsd0Regs->MMCCLK, MMCSD_MMCCLK_CLKEN, ENABLE); } void SDCardIdentification(void) { // 1. Use the MMC command register (MMCCMD) to issue the GO_IDLE_STATE (CMD0) // command to the MMC cards. Using MMCMD to issue the CMD0 command puts all cards // (MMC and SD) in the idle state and no response from the cards is expected. //allow 74+ clock cycle to the card for initialization after power up CSL_FINST(mmcsd0Regs->MMCCMD, MMCSD_MMCCMD_INITCK, INIT); //set no data transfer with this command CSL_FINST(mmcsd0Regs->MMCCMD, MMCSD_MMCCMD_WDATX, NO); //no response is expected CSL_FINST(mmcsd0Regs->MMCCMD, MMCSD_MMCCMD_RSPFMT, NORSP); //set CMD0 CSL_FINS(mmcsd0Regs->MMCCMD, MMCSD_MMCCMD_CMD, 0); //wait for the response/command to be done while (CSL_FEXT(mmcsd0Regs->MMCST0, MMCSD_MMCST0_RSPDNE) != 1) { ; } // 2. Use MMCCMD to issue the APP_CMD (CMD55) command (R1 response is expected) to // indicate that the command that follows is an application command. //unallow 74+ clock cycle to the card for initialization after power up CSL_FINST(mmcsd0Regs->MMCCMD, MMCSD_MMCCMD_INITCK, NO); //set no data transfer with this command CSL_FINST(mmcsd0Regs->MMCCMD, MMCSD_MMCCMD_WDATX, NO); //R1 response is expected CSL_FINST(mmcsd0Regs->MMCCMD, MMCSD_MMCCMD_RSPFMT, R1); //the response is not expected to be a R1b CSL_FINST(mmcsd0Regs->MMCCMD, MMCSD_MMCCMD_BSYEXP, NO); //set CMD55 CSL_FINS(mmcsd0Regs->MMCCMD, MMCSD_MMCCMD_CMD, 55); //wait for the response/command to be done while (CSL_FEXT(mmcsd0Regs->MMCST0, MMCSD_MMCST0_RSPDNE) != 1) { ; } // 3. Use MMCCMD to send the SD_SEND_OP_COND (ACMD41) command with the voltage // range supported (R3 response is expected) to SD cards. Using MMCCMD to send the // ACMD41 command allows the host to identify and reject cards that do not match // the VDD range that the host supports. //R3 response is expected CSL_FINST(mmcsd0Regs->MMCCMD, MMCSD_MMCCMD_RSPFMT, R3); //set CMD41 CSL_FINS(mmcsd0Regs->MMCCMD, MMCSD_MMCCMD_CMD, 41); //wait for the response/command to be done while (CSL_FEXT(mmcsd0Regs->MMCST0, MMCSD_MMCST0_RSPDNE) != 1) { ; } // 4. Use MMCCMD to send the ALL_SEND_CID (CMD2) command (R2 response is expected) // to the MMC cards. Using MMCCMD to send the CMD2 command notifies all cards to // send their unique card identification (CID) number. There should only be one // card that successfully sends its full CID number to the host. The successful // card goes into identification state and does not respond to this command // again. //R2 response is expected CSL_FINST(mmcsd0Regs->MMCCMD, MMCSD_MMCCMD_RSPFMT, R2); //set CMD2 CSL_FINS(mmcsd0Regs->MMCCMD, MMCSD_MMCCMD_CMD, 2); //wait for the response/command to be done while (CSL_FEXT(mmcsd0Regs->MMCST0, MMCSD_MMCST0_RSPDNE) != 1) { ; } // 5. Use MMCMD to issue the SEND_RELATIVE_ADDR (CMD3) command (R1 response is // expected) in order to ask the card to publish a new relative address for future // use to address the card in data transfer mode. //R2 response is expected CSL_FINST(mmcsd0Regs->MMCCMD, MMCSD_MMCCMD_RSPFMT, R2); //set CMD2 CSL_FINS(mmcsd0Regs->MMCCMD, MMCSD_MMCCMD_CMD, 2); //wait for the response/command to be done while (CSL_FEXT(mmcsd0Regs->MMCST0, MMCSD_MMCST0_RSPDNE) != 1) { ; } // 6. Repeat Step 4 and Step 5 to identify and retrieve relative addresses from all // remaining SD cards until no card responds to the CMD2 command. No card // responding within 5 memory clock cycles indicates that all cards have been // identified and the MMC card and the identification procedure terminates. }
Thank you for any help you can provide me.
Arthur