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EMIFA Data Bus Parking timings

fdm
Expert 1070 points

Hi, 

The latest revision of C6745 TRM (18.2.6 Data Bus Parking) says:

"The data bus is released (tri-stated) when the chip enable (EMA_CS[n]) is asserted by EMIFA for the read access. After the read operation is completed, the data bus is driven again by the bus parking feature at the end of the turnaround time."

But there's no data in DS (SPRS377E) for EMA_D[15:0] 3-stated/driving timings in the EMIFA Asynchronous Memory Switching Characteristics (Table 5-23).

Moreover, it is unclear whether the data bus is released in Select Strobe mode at the start of setup period as it shown in Figure 18-12 of TRM  or at the start of strobe period ("when the chip enable (EMA_CS[n]) is asserted ")?

So what are the correct functional and timing characteristics of the EMIFA data bus within the Asynchronous Read Cycle?

BR,
   Denis

  • 0
    TI__Expert 7470 points

    Hi Denis,

    Thank you for bringing this to our notice. Indeed, the sentence on data bus parking in the TRM applies to the normal operating mode. In Select Strobe mode, the data bus is released at the start of the setup period. This will be updated in the next revision of the TRM.

    We apologize for the inconvenience but timing for this feature has not been characterized.There are no plans in the near future to add it to the datasheet.

    Regards,

    Sunil Kamath