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CAN AM335X LCD FB basemem be modified any time

according TRM, AM335X LCD triggered End of Frame 0 and End of Frame 1 Interrupt. We modify LCDDMA_FBX_BASE and LCDDMA_FBX_CEILING at that Interrupt routine . my question is:

CAN AM335X LCD FB basemem be modified any time . eg. I modify  LCDDMA_FB0_BASE and  LCDDMA_FB0_CEILING  when  DMA is fetch data from FB0.

  • Hi,

    The TRM isn't really clear about this, but judging by the what is described in section 13.3.3 DMA Engine (page 1097), the steps should be:

    - To program the DMA engine, configure the registers: LCDDMA_CTRL, LCDDMA_FB0_BASE, LCDDMA_FB0_CEILING
    - Configure the LIDD_CTRL or the RASTER_CTRL registers
    - Enable DMA transfers: the LIDD_DMA_EN bit (in the LIDD_CTRL register) or the LCDEN bit (in the RASTER_CTRL register) should be written with 1.

    Even if it is allowed to modify the FB basemem at any time, it is strongly recommended not to do it while fetching data from the FB, as it may cause issues.

    Best regards,
    Miroslav

  • Miroslav is correct. You should never modify those addresses while the DMA is currently fetching data from that frame buffer. A better option would be to use two frame buffers (ping-pong method) so you can set the base and ceiling address of the data you are about to transfer while the existing one is being sent out.

    Regards,

    Tyler