http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.faqs/ka13567.html
Hello,
I was wondering if the access to 64 bit values between ARM and C6000 can be synchronized so the access
looks atomic for ARM and C6000, do examples of this exist somewhere?
I was thinking of creating a function or macro to explicitly mark this synchronization but was searching for instructions or means
of synchronization that are present in the OMAP L138 to ease this process.
The C6000 supports instructions to load/store a double word [LDDW/STDW],
The ARM core supports GCC atomic builtins http://gcc.gnu.org/onlinedocs/gcc-4.2.0/gcc/Atomic-Builtins.html
The GCC builtins ( gcc 4.4+ )generate ARM instructions ( which can be regarded as atomic ) but do not take into account the C6000 i presume.
We are compiling code for Arm Linux EABI so this synchronization may be handled in our driver for the C6000 application.
Questions:
1. Do any helpful instructions exist to synchronize the C6000 and ARM when accessing 64 bit values,
or does this require a custom implementation?
2. Any suggestions on how to implement 64 bit synchronization between ARM and C6000 ( do examples exist? )
Regards,
Rob