Hi,
In PCIe Spec. it is mentioned that supports 64-bits addressing.
But in TI Code Example, I found just 32-bits.
So can I perform the 64-bits addressing normally, or there are some limitations?
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Hi,
In PCIe Spec. it is mentioned that supports 64-bits addressing.
But in TI Code Example, I found just 32-bits.
So can I perform the 64-bits addressing normally, or there are some limitations?
Delared,
There is no limitation of 64-bit addressing in the C66x PCIe module.
Please take a look at the outbound/inbound transaction example mentioned in the PCIe user guide (example 2-1, 2-2) or PCIe use case document (example 2, 4), which has example of 64-bit addressing translation.