AM335x EtherCAT DC Offset Write -> Local time high 32 bits clear

Hello,

We ran the following test from TwinCAT on an EL9800 slave running in Digital Input/Output mode. We took it to OP state in DC synchronization, and then from TwinCAT, we wrote various values in 0x924 and 0x926, while monitoring 0x910:0x918.

Our observation was that 0x914 and 0x916 got accordingly updated by EL9800 also.

Please let us know the ESC Rev, Type, build and Features (you can read them from registers 0x0000 to 0x0008 on your slave).

Hi,

Thanks for the reply. As a quick response, here is my version information:

root@devnz:~# uname -a
Linux devnz 2.6.32.20 #4 SMP PREEMPT Thu Mar 14 03:15:10 EDT 2013 i686 GNU/Linux
root@devnz:~# ethercat version
IgH EtherCAT master 1.5.2 2eff7c993a63

root@devnz:~# ./slave_version 0      <--- EK1814 (ET1100)
+ ethercat reg_read -p 0 -t uint8 0
0x11 17
+ ethercat reg_read -p 0 -t uint8 1
0x00 0
+ ethercat reg_read -p 0 -t uint16 2
0x0002 2
+ ethercat reg_read -p 0 -t uint8 4
0x08 8
+ ethercat reg_read -p 0 -t uint8 5
0x08 8
+ ethercat reg_read -p 0 -t uint8 6
0x08 8
+ ethercat reg_read -p 0 -t uint8 7
0x3b 59
+ ethercat reg_read -p 0 -t uint16 8
0x00fc 252
root@devnz:~# ./slave_version 1   <-- AM335x
+ ethercat reg_read -p 1 -t uint8 0
0x90 144
+ ethercat reg_read -p 1 -t uint8 1
0x01 1
+ ethercat reg_read -p 1 -t uint16 2
0x024e 590
+ ethercat reg_read -p 1 -t uint8 4
0x08 8
+ ethercat reg_read -p 1 -t uint8 5
0x08 8
+ ethercat reg_read -p 1 -t uint8 6
0x08 8
+ ethercat reg_read -p 1 -t uint8 7
0x0f 15
+ ethercat reg_read -p 1 -t uint16 8
0x008c 140

I understand that the system time register 0x910 will be affected by writes to the offset register 0x920, by design. My issue was on the AM335x, successive writes of a constant value to the offset register will result in a discontinuous jump of the system time register, apparently due to the corruption of the high 32 bits (0x914-7).

In the ET1100, writing a zero to 0x920, waiting five seconds, then writing another zero will not cause a step change in 0x910 (it will continue to count time in nsec, without a jump). 

root@devnz:~# ./slave_910_jump 0 <-- slave 0 is EK1814 (ET1100)
+ ethercat reg_read -p 0 -t uint64 0x910
0x0000c9874c1da7de 221582934779870
+ ethercat reg_write -p 0 -t uint64 0x920 0 <-- zero offset (see local time via system time)
+ ethercat reg_read -p 0 -t uint64 0x910 <-- get local time
0x0000435384b9efee 74025988124654 
+ sleep 5
+ ethercat reg_read -p 0 -t uint64 0x910 <-- after 5sec, local time is +5e9, as expected
0x00004354af4953f2 74030997132274
+ ethercat reg_write -p 0 -t uint64 0x920 0 <-- write zero again to offset (no change)
+ ethercat reg_read -p 0 -t uint64 0x910 <-- local time has increase monotonically, as expected
0x00004354affa909b 74031008747675
root@devnz:~# ./slave_910_jump 1 <-- slave 1 is TI ICE AM335x
+ ethercat reg_read -p 1 -t uint64 0x910
0x000003ef1b9a469d 4325495162525
+ ethercat reg_write -p 1 -t uint64 0x920 0 <-- zero offset
+ ethercat reg_read -p 1 -t uint64 0x910 <-- get local time, seems low; continue...
0x000000001c58bffb 475578363
+ sleep 5
+ ethercat reg_read -p 1 -t uint64 0x910 <- local time +5e9, as expected
0x0000000146ce268a 5482882698
+ ethercat reg_write -p 1 -t uint64 0x920 0 <-- write zero again to offset (no change)
+ ethercat reg_read -p 1 -t uint64 0x910 <-- PROBLEM! time has decreased! :-(
0x00000000477cfe67 1199373927

Of course, sleep 5 is selected as ceil(2^32 nsec) in seconds, to cause an overflow of the low 32 bits.

Thanks - Dave

Hi,

Can you please check whether this issue is fixed in 1.0.0.8 release - http://software-dl.ti.com/dsps/dsps_public_sw/am_bu/AM335x_SYSBIOS_Industrial_SDK/latest/index_FDS.html

From http://processors.wiki.ti.com/index.php/AM335x_SYSBIOS_Industrial_SDK_01.00.00.08_Release_Notes

As a first look, 1.0.0.8 appears to have resolved the issue. I will complete testing tomorrow, probably.

Thanks -  Dave