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EMIF CE in 6678

Johannes
Mastermind 6240 points

Hi,

I'm testing the EMIF module and I see that EMIFCE is enabled and disabled for each operation performed, but in the manual we have:

"EMIFCE becomes inactive (if no additional read/write accesses to the same chip select space are pending)."

So it should be active until the last operation. My problem is the same of this post http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/p/152723/553985.aspx , is this normal? Is there a way to guarantee that EMIFCE will be deactivated only after the last operation?

Thanks

  • 0
    TI__Mastermind 42545 points

    The determination of whether there is a pending request is made by the EMIF16 module based on transfer requests it receives from the VBUS interface. There is no way to guarantee that the requests will be queued causing the CE to remain low between two transfers. The statement you included in your post doesn't mean that the CE will remain low between accesses to the same Chip select space, it means that it is possible that the CE may remain low.  A  normal EMIF memory access would include the CE toggling low at the start and toggling high when the access is complete. If addition access are pending the CE may remain low between the first access and the second access.  Your interface logic must be designed to handle both cases.

    Regards, Bill