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SRIO connecting problem

yu fei
Intellectual 300 points

Im trying to connet EVM6678 with a fpga using lane 3, using the example program multicoreLoopback. Result shows sent successfuly, but non of the cores received any data. 

I just cannot figure out how to configure the socket to a specific lane or port. Im wondering how the socket works.

Many thanks

  • 0
    TI__Mastermind 23525 points

    I will ask some of the LLD experts to chime in, but from a HW perspective outbound port and priority is determined by the SRIO transmit queue that the message is put on. 
    This is done with RIO_TX_QUEUE_SCH_INFOx registers for port number and CDMA registers for priority.  The RIO_TX_QUEUE_SCH_INFO registers are programmed initially before the peripheral is enabled completely.  So the real question is how the socket maps to a TX queue.

    Regards,

    Travis

  • 0 in reply to tscheck
    Intellectual 300 points

    Thanks very much.

    Looking forword to your answer