C6678 Hyperlink Interrupts

Hi,

MPS just means the remote or internal interrupt controllers like GEM Intc or CICs. it has 8 index (0 ~ 7) and any number can be assigned for your interrupt setup.  I know it is not easy to understand all of this without helping from example code. I attached SW generated interrupt example for you. you can learn many things from this and may apply this for your own purpose.

Regards,

Albert1263.Hyperlink_EVM_example_LE.zip

Thanks for the example and quick response.

"MPS just means the remote or internal interrupt controllers like GEM Intc or CICs. it has 8 index (0 ~ 7) and any number can be assigned for your interrupt setup.". So what's the point of it, as all it seems to do is add to the complexity of the device? Are meanings for the possible values defined anywhere?

" I know it is not easy to understand all of this without helping from example code" Don't you think it would be better for everyone if the documentation were completely rewritten to make everything so clear that examples would just be the icing on the cake? What is the point of documentation if it doesn't allow you to use the device?

I have looked at the example and it is not at all clear what's going on. Because it is just one program that's loaded to two DSPs, it isn't clear if an interrupt is actually being provoked locally or on the remote DSP; the result would appear the same in both cases.

Could you please explain what the documentation means by "The Generate Soft Interrupt Register should be written with a vector of the hardware
index of the interrupt that is enabled for software interrupts."  What is a vector of the hardware index of the interrupt when it's at home?

Regards,

Peter

There's yet another thing in the example that I cannot understand.

There is a mapping of interrupt numbers: 111 : 64 : 22 : 4

I understand 111 is the hyperlink input to CIC0 and this is being explicitly mapped to channel 64.

I understand that host event 22 is mapped in the INTMUX registers to CPU interrupt 4.

What I cannot fathom is how do you get from channel 64 to host event 22? Where is this documented?

Regards,

Peter

It is in the device data manual interrupt chapter. it shows the mapping of CIC0 output 64 is connected to GEM intc input 22

Regards,

Albert

vector number is just simple index to support Hyperlink configuration flexibly. it is not related to CPU level interrupt vector. MPS is same. it is simple index for your programming and not a serious object number. normally, you can simply use MPS 0 if you need only one interrupt setup.

Regards,

Albert

Sorry, but I must be dense, but your message means nothing to me.

"vector number is just simple index to support Hyperlink configuration flexibly. it is not related to CPU level interrupt vector." What IS it related to? What does it do?

"MPS is same. it is simple index for your programming and not a serious object number."

Do you mean that both of these values have no significance to any hardware and are values that can be used completely arbitrarily by software?

The question I asked was "What is a vector of the hardware index of the interrupt" What is a vector of an index (the phrase carries no meaning for me)? Does it just mean an index value? If so, why not simply say "interrupt index", if not, what does it mean?

Still utterly confused.

"It is in the device data manual interrupt chapter. it shows the mapping of CIC0 output 64 is connected to GEM intc input 22"

I have looked at the C6678 Data Manual (SPRS691C) and searched for all mentions of the strings "64" and "22". None of them seems to mention anything about this mapping.

Table 7-38 gives Event number 22 as CIC0_OUT(32+1+11*n) or CIC1_OUT(32+1+11*(n-4)) . The values here are 33, 44, 55, 66; 64 is not included.

Event number 31 (not 22) gives CIC0_OUT(32+10+11*n) which is 64 when n=2.

So the document seems to be saying that CIC0 output 64 is connected to input 31 (core #2) and input 22 is connected to CIC0 output 66 (core #3)

Please let me know which document you mean and which page shows CIC0 output 64 being connected to input 22.

I tested my code on 6670.

In case of 6678, CIC0_out 32 is connected to CPU intc input 21, so you need to change these numbers from the code.

Sorry for the confusion.

Albert

That explains it :-)

So what about the "vector of the hardware index of the interrupt" question?