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U-Boot 2011.09 SPL questions

Henrik Abrahamsson
Intellectual 300 points
Other Parts Discussed in Thread: AM3517

Hi,

I have a custom board with an AM3517 processor. I have previously used x-loader and U-Boot 2010.06. I am now trying to update to U-Boot 2011.09 and found that the x-loader concept is no longer used and that I instead should use the new U-Boot SPL framework.

However, I have trouble understanding how this works exactly. I have compiled the new U-Boot for my target and an MLO file and an u-boot.img file have been generated. When I put these files on a SD card it works like a charm and my board can boot into Linux ok.

But now I want to boot from NAND. So I tried to write the MLO file and u-boot.img to NAND but the boot log now looks like the log below. It seems to load the SPL from the NAND flash but I get all these error messages. And then it looks like it loads the "main" u-boot but it hangs before reading the linux kernel. 

Must I compile the SPL and U-Boot in some magic way in order to boot from NAND memory? Should I use the generated MLO and u-boot.img files or some other files to write to NAND? In the spl folder I also see a generated u-boot-spl and u-boot-spl.bin? What are these files used for?

Any information is much appreciated. Thanks!

         @QT,0  @ø
U-Boot SPL 2011.09 (Apr 05 2013 - 14:35:32)
Texas Instruments Revision detection unimplemented
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U-Boot 2011.09 (Apr 05 2013 - 14:35:32) R5 1.3_TESTING

I2C:   ready
DRAM:  256 MiB
board_init
NAND:  HW ECC selected
1024 MiB
MMC:
Using default environment

In:    serial
Out:   serial
Err:   serial
Die ID #63d60001000000000160ae2c1701d017
8 BIT SW ECC selected
Hit any key to stop autoboot:  0

  • 0
    Intellectual 300 points

    An update:

    I have spend an entire day debugging this problem and found the following:

    I modified the SPL to print out the entire U-Boot file "u-boot.img" that the SPL reads from NAND to load into RAM which is done in function "spl_nand_load_image" in arch/arm/cpu/armv7/omap-common/spl_nand.c.

    I then compared it to the generated u-boot.img that I wrote to NAND in the first place and saw that it was almost the same but had a few bits here and there that did not match. These bit errors occured because the ECC algorithm wrongly detected 1-bit errors and flipped the bits in the function "omap_correct_data" in file drivers/mtd/nand/omap_gpmc.c. When I removed the bit error correction in this file the u-boot.img file that SPL read from NAND was correct and everything booted ok.

    So it looks like the ECC check in the SPL goes wrong somehow.

    When I write the MLO and u-boot.img to NAND I use "nandecc hw 2". Is this not correct? Or what could cause the SPL to wrongly detect bit errors in "omap_correct_data"?

    Best regards,

    Henrik Abrahamsson

  • 0 in reply to Henrik Abrahamsson
    Intellectual 300 points

    I solved my problem. I use an 8 bit wide databus to my NAND memory so I use GPMC_NAND_ECC_LP_x8_LAYOUT instead of GPMC_NAND_ECC_LP_x16_LAYOUT. But I had set my CONFIG_SYS_NAND_ECCPOS to {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13} instead of {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12} as it should be when using 8 bits.

    Everything works ok now.