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How can Master Oscillator OFF in deep sleep mode 0 of AM335x?

From the AM335x user manual, the deep sleep mode 0 shall turn off the master oscillator, actually, in M3 code, it is.

From the kernel code(clock33xx_data.c), we can figure out that most clock is inherited from master oscillator.(in kernel code, which is from sys_clkin_ck and sys_clkin_ck is  from virt_24m_ck, right?)

My question is: 

If the master oscillator is gated off, how can the Soc wake up?

In this case, most clocks are off(only root 32kHz clock and Soc 32KHz clock are alive), how can the Soc works?

  • This is explained in sections 8.1.4.4 - 8.1.4.6 of the AM335X Technical Reference Manual.
  • It seems that M3 shall take the responsibility to provide the clock to let some guys work so that M3 can get some interrupt, right?

  • 8.1.4.6.3 Wakeup Sequencing
     
    This section gives the guidelines for Wakeup sequencing.
     
    1. One of the wakeup event triggers (which was configured during the sleep sequencing) will initiate a wakeup sequence
    2. The wake up event will switch on the oscillator (if it was configured to go OFF during sleep)
    3. The wake up event will also trigger interrupt to Cortex M3
    4. On the wakeup event due to interrupt Cortex M3 execute the following
    • Restore the voltages to normal Operating voltage
    • Enable PLL locking
    • Cortex M3 will switch ON the power domains and/or enable clocks for PD_PER
    • Cortex M3 will switch ON the power domains and/or enable clocks for PD_MPU
    • Executes WFI
    5. Cortex A8 MPU starts executing from ROM reset vector
    6. Restore the application context(only for Deep sleep 0)