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C6657 EVM DDR3 init sometimes fails

Günter
Intellectual 460 points

Hello, I'm using the platfrom library to initialize the DDR3 memory after booting from parallel NOR flash on CE1. Booting is stable, but sometimes the DDR memory is not accessible. Currently I'm not sure whether DDR memory is already initialized by RBL or IBL, so it may be a re-initialization problem. To reproduce the problem without booting, I created the following sequence:

1) Call platform_init with init_flags.pll and init_flags.ddr both set to 1. This is necessary to switch to 666.67MHz (My GEL file doesn't do it for some reason).

2) Repeatedly call platform_init with init_flags.ddr set to 1 and then do a DDR memory access test (read-invert-write-readback) Running this shows errors from time to time. It looks like it has to do with read or write levelling. Note: When omitting the initial platform_init call (causes to run DDR3 at 333MHz), the errors occur less frequently. Is the platfrom library (PDK v1.1.2.6) the correct reference for initializing a C6657EVM (PCB 17-00132-02, PCA 18-00132-02)?

Can anyone try to verify this behaviour on his EVM?

The error should appear within one minute when runing at 666.67MHz. Can anyone confirm that the workarounds from SPRZ381 have been implemented in the platform lib?

Below is the source code; attaching the entire project seemed to fail.

#include #include #include #include #include "platform_internal.h" #include "resource_mgr.h" /* OSAL functions for Platform Library */ uint8_t *Osal_platformMalloc (uint32_t num_bytes, uint32_t alignment) { return malloc(num_bytes); } void Osal_platformFree (uint8_t *dataPtr, uint32_t num_bytes) { /* Free up the memory */ if (dataPtr) { free(dataPtr); } } void Osal_platformSpiCsEnter(void) { /* Get the hardware semaphore. * * Acquire Multi core CPPI synchronization lock */ while ((CSL_semAcquireDirect (PLATFORM_SPI_HW_SEM)) == 0); return; } void Osal_platformSpiCsExit (void) { /* Release the hardware semaphore * * Release multi-core lock. */ CSL_semReleaseSemaphore (PLATFORM_SPI_HW_SEM); return; } /****************************************************************************** * Function: main ******************************************************************************/ void main (int argc, char *argv[]) { platform_init_flags init_flags; platform_init_config init_config; Bool bError; /* do a first initialization with PLL and DDR to switch to 666.67MHz */ memset(&init_flags, 0x00, sizeof(platform_init_flags)); memset(&init_config, 0x00, sizeof(platform_init_config)); init_flags.pll = 1; init_flags.ddr = 1; if (platform_init(&init_flags, &init_config) != Platform_EOK) printf("Platform failed to initialize\n"); /* main loop */ for(;;) { /* platform lib initialization */ memset(&init_flags, 0x00, sizeof(platform_init_flags)); memset(&init_config, 0x00, sizeof(platform_init_config)); init_flags.ddr = 1; /* DDR3 only; no PLL */ if (platform_init(&init_flags, &init_config) != Platform_EOK) printf("Platform failed to initialize\n"); /* do a memory test */ { Uint32 *pWork = (Uint32 *)0x80000000; //point to start of DDR3 Uint32 u32Tmp; bError = FALSE; do { *pWork = u32Tmp = ~(*pWork); if (u32Tmp != *pWork) { fpgaControlUserLEDs(FPGA_USER_LED0, FPGA_LED_ON); bError = TRUE; break; } } while (++pWork

  • 0
    TI__Expert 6815 points

    Hi Günter,

    I will get in touch with the bootROM experts for your question on DDR initialization by RBL or IBL. I think IBL does perform DDR3 init, but I will wait for the experts to confirm.

    1) The DDR3 init routine in evmc6657l.gel should correctly initialize DDR3 to 666.67MHz. Are you using this GEL supplied by TI?

    2) Are you placing any part of your code in DDR3? Assuming DDR is initialized by IBL, setting the ddr flag to 1 will re-initialize DDR and corrupt your code in DDR.

    I will update this post as soon as I have more information from TI sources. In the meantime, please send us answers to the above questions.

    I think the post scrambled your code and packed multiple lines without any carriage return. Can you attach your project as a zip file? It should be possible.

  • 0 in reply to Aditya
    Intellectual 460 points
    Hi Aditya, 1) I'm using mcsdk_2_01_02_06/tools/program_evm/gel/evmc6657l.gel. This (and also older GEL files) definitely initializes to 333 MHZ (=DDR3-667). 2) There's no code in DDR3 for the test application. DDR3 is only accessed as data. Uploading doesn't work, but I'll try from another account this evening.
  • 0 in reply to Günter
    TI__Expert 6815 points

    Günter,

    Thanks for confirming. An update here is that the IBL does NOT perform DDR3 init so you need to either use GEL/your own C-code/platform lib to do it

    "This (and also older GEL files) definitely initializes to 333 MHZ (=DDR3-667)" --> Is this based on any clock that you probed? What GEL API are you calling from the Scripts menu? Per the GEL file, the effective PLLM is 20 and the divider is 2. With a 66.67MHz refclk, that gives you 66.67*(20/2) = 666.67MHz DDR clock. If you see anything different, let me know the value of the DDR3PLLCTL0 register and I will verify it for you.

    Attached is the EVM C6657 GEL that ships with CCSv5.

    6811.evmc6657l.gel

  • 0 in reply to Aditya
    Intellectual 460 points

    Aditya,

    Thanks your your assistance so far. It is good to know that DDR memory is not touched before the booted application starts.

    The Gel files v1.000 through v1.003 (also the one you sent) use DDR3 settings as shown on line 84 of your GEL file:

    // | 1333               | 50             | 39     | 2      |

    (DDR1333: 50MHz / (2+1) * (39 + 1) = 666.67 MHz)

    However, I actually measure 333.33 MHz at the unpopulated pad of the ECC memory, so I definitely have 333MHz = DDR3-666

    Back to the platform lib: If I initialize both, PLL and DDR, then the DDR PLL gets re-configured and I can measure the 667MHz clock. This is what I do in my test application first, before entering the loop.

    This time newlines seem to work and the attachment also got uploaded. So let's have a look at the code and see what your EVM tells...

    Guenter

    EVM_platform_lib_test_006.zip