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TMS320C6748 - Debug build runs fine, release build gets stuck?

Charles Cross
Intellectual 370 points

Hello,

I am having some issues getting my release build to run on my C6748.

I have many different compiler settings and have even made my release configuration settings match my debug settings completely (turned off optimization, turned debug features on). The part in my program that the release mode gets stuck in is this while loop:

    // Program the RATIO fields for each PLLDIV and disable unused clocks
    PLL0_PLLDIV1 = 0x8000;                                                  // Fixed ratio         /1      -> ( 1 / (0+1) ) = 1:1                // 300Mhz (Max: 375Mhz)
    PLL0_PLLDIV2 = PLL0_PLLDIV1 + 1;                            // Fixed ratio         /2      -> ( 1 / (1+1) ) = 1:2                // 150Mhz (Max: 187.5Mhz)
    PLL0_PLLDIV3 = 0x0002;                                                 // Variable ratio     /3      -> Disabled. No EMIFA.
    PLL0_PLLDIV4 = PLL0_PLLDIV1 + 3;                            // Fixed ratio         /4      -> ( 1 / (3+1) ) = 1:4                // 75Mhz  (Max: 93.75Mhz)
    PLL0_PLLDIV5 = 0x0002;                                                 // Variable ratio     /3      -> Disabled. Not used on chip.
    PLL0_PLLDIV6 = 0x0000;                                                 // Fixed ratio         /1      -> Disabled. Not used on chip.
    PLL0_PLLDIV7 = PLL0_PLLDIV1 + 5;                            // Variable ratio     /6      -> ( 1 / (5+1) ) = 1:6                // 50Mhz  (Max: 50Mhz)

    // Set the GOSET bit (b0) in PLLCMD high to initiate a new divider transition
    setBit( &PLL0_PLLCMD, 0 );

    // Wait for the GOSTAT bit in PLLSTAT to clear to 0 (completion of phase alignment).
    while( getBit( &PLL0_PLLSTAT, 0 ) == HIGH )
    {
          // Do nothing
    }

This should be familiar, as it is part of the common gel script initialization routine. I removed the dependency on gel scripts and put all of my initialization code in the program itself. I have tried putting delays all around, before, within, and after this while loop and the other parts of the this initialization routine before it gets called, thinking that the release mode may be executing too fast, but that made no difference. My routine follows that described by the reference manual for this exact chip exactly.

Does anyone have any suggestions or advice?

Thanks
Charles

  • 0
    Intellectual 370 points

    Alright, so I messed with it a bit more, and ended up retrying some things I thought I had done and got the release build to work.

    Regardless of whether or not Debug settings are turned on, the culprit for why the program gets stuck in that loop is the optimization settings after all.

    All builds will work at Optimization Levels 0 and 1, but 2 and higher cause it to get caught in that loop. I had suspected this at an earlier time, and thought that maybe functionality for checking that loop was getting optimized out, so I rewrote it in a number of different ways and made sure there was some "substance" to it, so that it wouldn't get thrown out.

    Does anyone know what could be causing this issue on the optimization side of things? Perhaps this is more of a CCS question at this point and less of a C6000 DSP matter, so feel free to move this topic if necessary.

    Thanks,
    Charles

  • 0 in reply to Charles Cross
    Intellectual 600 points

    is PLL0_PLLSTAT defined as volatile?

  • 0 in reply to 1768011
    Intellectual 370 points

    Ah, no. Here is the definition for it:

    #define PLL0_PLLSTAT            *(unsigned int*)( PLL0_BASE + 0x13C )        // PLL Controller Status Register

    All of my address pointers are defined like this. Is this incorrect?

  • 0 in reply to Charles Cross
    Intellectual 600 points

    this should prevent the optimizer from removing PLL0_PLLSTAT reads:

    #define PLL0_PLLSTAT *(volatile unsigned int*)( PLL0_BASE + 0x13C ) // PLL

  • 0 in reply to 1768011
    Intellectual 370 points

    This is absolutely correct and fixed my problem. Thank you very much. Are there any other tricks like this that I should know about the optimization process or are there any resources that talk specifically about this that you know of off hand?

    Thanks much!

  • 0 in reply to Charles Cross
    Intellectual 600 points

    There's something for the oposit direction. The keyword is called "restrict", have a look at the TI Document SPRU187O, page 130 for explanations of volatile and restricted keywords.