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DDR3 Memory read error problem

Choi Su Young
Prodigy 110 points

Hi, all,

I have two diffenent custom board with C6672 processor. One has 1.0GHz C6672 processor and the other has 1.25GHz C6672 processor.

The first one is working fine in read/write to DDR3 memory. But, the other is not properly working read/write DDR3 memory.

Error is like this :

CORE #0> dump 80000000
 80000000: 10 00 00 80 14 00 00 80  08 00 00 80 1C 00 00 80 ..z{..7.........
 80000010: 10 00 7A 7B FA DF 37 FD  18 00 00 80 1C 00 00 80 ..z{..7.........
 80000020: 30 08 04 80 34 08 04 80  38 08 04 80 3C 08 04 80 0...4...8...<...
 80000030: 20 00 00 80 34 00 00 80  38 00 00 80 3C 00 00 80 0...4...8...<...
 80000040: 40 00 00 80 44 00 00 80  48 00 00 80 5C 00 00 80 P...T...X...\...
 80000050: 50 08 04 80 54 08 04 80  58 08 04 80 5C 08 04 80 P...T...X...\...
 80000060: 60 00 00 80 64 00 00 80  68 00 00 80 7C 00 00 80 p...t...x...|...
 80000070: 70 08 04 80 74 08 04 80  78 08 04 80 7C 08 04 80 p...t...x...|...
CORE #0> dump 80000000
 80000000: 10 00 00 80 14 00 00 80  08 00 00 80 1C 00 00 80 ..z{..7.........
 80000010: 10 08 04 80 14 08 04 80  18 08 04 80 1C 08 04 80 ................
 80000020: 20 00 00 80 24 00 00 80  28 00 00 80 3C 00 00 80 0...4...8...<...
 80000030: 20 00 00 80 34 00 00 80  38 00 00 80 3C 00 00 80 0...4...8...<...
 80000040: 50 08 04 80 54 08 04 80  58 08 04 80 5C 08 04 80 P...T...X...\...
 80000050: 40 00 00 80 54 00 00 80  58 00 00 80 5C 00 00 80 P...T...X...\...
 80000060: 70 08 04 80 74 08 04 80  78 08 04 80 7C 08 04 80 p...t...x...|...
 80000070: 60 00 00 80 74 00 00 80  78 00 00 80 7C 00 00 80 p...t...x...|...
 
I am confused with this situation that row address is mixing or not correctly accessing.
I followed the schematics with EVM board.
 
Is there any different setting for 1.25GHz DSP processor?
 
 
Sincerely yours.
Choi Su Young
  • 0
    TI__Expert 6815 points

    Hi Choi,

    You can use the same DDR3 initialization sequence for both custom boards provided all of these factors remain the same:

    1. DDR3 data rate

    2. DDR net trace lengths

    3. SDRAM device part number

    4. Data bus width

    If any of these factors is different, you will have to use the PHY calc spreadsheet and register calculation spreadsheet that comes with the DDR3 init app note and recalculate your register values.

    If there are no changes in factors 1-4, we can take the debug forward.

  • 0 in reply to Aditya
    Prodigy 110 points

    HI, Aditya.

    Thanks for your reply.

    I eliminated the VTT termination resistor connected to 0.75V, then it works.

    Is it possible the elimination of VTT termination resistor?  And what should I check for VTT termination?

     

     

    Best Regards.

    Choi Su Young