Hello.
I am porting eCos to AM3359 processor.
I use macros from older ARM9 ports for creation of MMU transtlation table entries
(so bits 12 to 19 - AP, APX, TEX - are all zero).
#define ARC_ARM_MMU_FIRST_LEVEL_SECTION_ID 0x2
#define ARC_ARM_UNCACHEABLE 0
#define ARC_ARM_UNBUFFERABLE 0
struct ARC_ARM_MMU_FIRST_LEVEL_SECTION {
unsigned id : 2;
unsigned b : 1;
unsigned c : 1;
unsigned imp : 1;
unsigned domain : 4;
unsigned sbz0 : 1;
unsigned ap : 2;
unsigned sbz1 : 8;
unsigned base_address : 12;
};
union ARC_ARM_MMU_FIRST_LEVEL_DESCRIPTOR {
unsigned long word;
struct ARC_ARM_MMU_FIRST_LEVEL_FAULT fault;
struct ARC_ARM_MMU_FIRST_LEVEL_PAGE_TABLE page_table;
struct ARC_ARM_MMU_FIRST_LEVEL_SECTION section;
struct ARC_ARM_MMU_FIRST_LEVEL_FINE_TABLE fine_table;
};
#define ARC_ARM_MMU_SECOND_LEVEL_DESCRIPTOR_ADDRESS(page_table, table_index) \
(unsigned long *)((unsigned long)(page_table) + ((table_index) << 2))
#define ARC_ARM_MMU_SECTION(ttb_base, actual_base, virtual_base, \
cacheable, bufferable, perm) \
CYG_MACRO_START \
register union ARC_ARM_MMU_FIRST_LEVEL_DESCRIPTOR desc; \
desc.word = 0; \
desc.section.id = ARC_ARM_MMU_FIRST_LEVEL_SECTION_ID; \
desc.section.imp = 1; \
desc.section.domain = 0; \
desc.section.c = (cacheable); \
desc.section.b = (bufferable); \
desc.section.ap = (perm); \
desc.section.base_address = (actual_base); \
*ARC_ARM_MMU_FIRST_LEVEL_DESCRIPTOR_ADDRESS((ttb_base), (virtual_base)) \
= desc.word; \
CYG_MACRO_END
/* The macro ARC_X_ARM_MMU_SECTION is used to define a memory map.
*
* abase, vbase, size : in units of MB
* abase : physical memory start address in MB
* vbase : virtual memory atart address in MB
* size : memory size in MB
* cache : if memory is cacheable or not
* buff : if memory is write back or write thru
* access : access rights to be used
*
* note: the variable ttb_base is used implicitly
* ttb_base is the physical address of the first level page table
*/
#define ARC_X_ARM_MMU_SECTION(abase,vbase,size,cache,buff,access) \
CYG_MACRO_START \
int numpages; int phys = (abase); int virt = (vbase); \
for (numpages = (size); numpages > 0 ; numpages--, phys++, virt++) \
{ \
ARC_ARM_MMU_SECTION(ttb_base, phys, virt, \
(cache), (buff), (access)); \
} \
CYG_MACRO_END
I have encountered the following problem:
When I try to map 1 MB with ARC_X_ARM_MMU_SECTION to any virtual addredd except for 0x0, everything is OK.
But if I try to map anything (DDR memory, for example) to 0x0 virtual address, I get data abort when trying to access the mapped virtual address area.
/// Actual Virtual Size Attributes
/// Base Base MB cached? buffered? access permissions
/// xxx00000 xxx00000
ARC_X_ARM_MMU_SECTION(0x800, 0x000, 1, ARC_ARM_UNCACHEABLE, ARC_ARM_UNBUFFERABLE, ARC_ARM_ACCESS_PERM_RW_RW);
Thank you in advance.
