So we have a device with multiple GPMC ChipSelects setup. CS0 is going to an async NAND Flash chip (hosting the filesystem) and CS1/CS2 are going to an FPGA. CS2 uses WAIT signalling (the other two do not). If the FPGA is unprogrammed or otherwise not handling the WAIT signal properly, it causes a Bus Error (presumably from the WAIT signal being held active for too long and the GPMC subsystem hitting a timeout). However, when the bus error occurs, it locks up the entire GPMC bus, rather than just that one CS. This causes the Linux system to grind to a halt (since the FS is nonresponsive). My question is two fold:
1) Is it possible to make the Bus Error isolated to a single chip select (so we can at least still access the filesystem even if the FPGA is non responsive).
2) Is it possible to reset the GPMC subsystem (or at least clear the Bus Error for that one CS) after we've reprogrammed the FPGA or taken other action?
