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Can someone explain the MCSPI FIFO operation?

I'm using starterware 2.0.0.7.

I'm trying to increase the throughput of SPI data transfer.  I'm using the FIFOs in an attempt to pipeline the data, but it appears that I can't write to the fifo fast enough.  As soon as I put a word into the fifo, it is written to the SPI bus before another can be written.  Can someone explain the general flow of loading the data into the fifo?  Heres my setup:

static void McSPISetUp(void)
{
/* Reset the McSPI instance.*/
McSPIReset(SOC_SPI_0_REGS);

/* Enable chip select pin.*/
McSPICSEnable(SOC_SPI_0_REGS);

/* Enable master mode of operation.*/
McSPIMasterModeEnable(SOC_SPI_0_REGS);

/* Perform the necessary configuration for master mode.*/
McSPIMasterModeConfig(SOC_SPI_0_REGS, MCSPI_SINGLE_CH, MCSPI_TX_RX_MODE,
MCSPI_DATA_LINE_COMM_MODE_1, MCSPI_CH_NUM);

/* Configure the McSPI output frequency. */
McSPIClkConfig(SOC_SPI_0_REGS, MCSPI_IN_CLK, MCSPI_OUT_FREQ,
MCSPI_CH_NUM, MCSPI_CLK_MODE_0);

/* Configure the word length.*/
McSPIWordLengthSet(SOC_SPI_0_REGS, MCSPI_WORD_LENGTH(8), MCSPI_CH_NUM);

/* Set polarity of SPIEN to low.*/
McSPICSPolarityConfig(SOC_SPI_0_REGS, MCSPI_CS_POL_LOW, MCSPI_CH_NUM);

/* Enable the Tx FIFO of McSPI.*/
McSPITxFIFOConfig(SOC_SPI_0_REGS, MCSPI_TX_FIFO_ENABLE, MCSPI_CH_NUM);

/* Enable the Rx FIFO of McSPI.*/
McSPIRxFIFOConfig(SOC_SPI_0_REGS, MCSPI_RX_FIFO_ENABLE, MCSPI_CH_NUM);

McSPITurboModeEnable(SOC_SPI_0_REGS, MCSPI_CH_NUM);
}

Then, if I call the following and watch it on the oscilloscope, the GPIO pulses surround each spi read operation.  

for(i=0;i<10;i++)

{

GPIO_High();

McSPITransmitData(SPI_BASE, *p_tx, SPI_CHAN);

GPIO_Low();

}

Why is the fifo not filling up, but instead blocking until the word is transmitted to the SPI bus?