Inbuilt Watchdog timer in DM8168

FIROZ KHAN

Prodigy 60 points

Hi,

DM8168 Watchdog timer

Delay interrupt is generated when counter matches Delay register (WDT_WDLY).

When the watchdog timer counter register (WDT_WCRR) overflows, an active-low reset pulse is

generated to the PRCM module.

Query:After interrupt generation, can we Kick interrupt information and stick/pause watchdog timer so that watchdog timer counter register (WDT_WCRR) overflows will not happen and PRCM module will not get reset.

over 13 years ago

0 1330hayacool7102 over 13 years ago

Guru 10655 points

hi FIROZ,

may I know your goal? a timer with interrupt only? or...

0 FIROZ KHAN over 13 years ago in reply to 1330hayacool7102

Prodigy 60 points

Hi,

Our aim is after interrupt occur processor will be able to store eventlog/information and will be able to inhibit in that state.By this,watchdog overflow will be avoided and PRCM module will not get reset.

0 1330hayacool7102 over 13 years ago in reply to FIROZ KHAN

Guru 10655 points

did you mean "store eventlog/information before reboot" ? or "store eventlog/information when time's up without reboot" ?

0 FIROZ KHAN over 13 years ago in reply to 1330hayacool7102

Prodigy 60 points

Means "store eventlog/information when time's up without reboot".

0 1330hayacool7102 over 13 years ago in reply to FIROZ KHAN

Guru 10655 points

it seems that you need general timer function instead of watchdog timer. Right? if yes, you could do it by timer API (like QTimer...) from you specific library or HW timer.

0 FIROZ KHAN over 13 years ago in reply to 1330hayacool7102

Prodigy 60 points

Hi Jack,

We want to use watchdog timer only.

My query is that :

Between delay interrupt generation and Watchdog overflow happens ,can we reload watchdog timer?

If reload watchdog timer is possible then we can avoid watchdog overflow and PRCM module wll not get reset.

Processors

Processors forum

Inbuilt Watchdog timer in DM8168