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GPIO #2 ~ #7 Interrupts on DSP6672 board.

Other Parts Discussed in Thread: TMS320C6672

Hi.

 

Section 7.9 in TMS320C6672 data maual illustrates that the event number of GPINTn is 90 and 'n'  is the CorePac number.

Does that mean it is impossible to make GPIO2 ~ GPIO7 as interrupt sources on TMS320C6672 board?

Or, if there is a way, please let me know.

 

Thanks.

 

  • No, GPIO2-7 still have their own separate events as well (Event #8-13.)

    The Event 90, was to have a common Event number for a 'Local CPU interrupt' that could be targeted by specific GPIO's w/o the extra work of remapping - which could have been done.  That said, each of the GPIO's 0-7 are also tied to specific event numbers and can be used for interrupts.

    Best Regards,
    Chad

  • Dear Chad,

     

    Thank you very much for your reply.

    But, there is something different from DSP6672 datasheet in your reply.

    I couldn’t find separate events for GPIO 0 ~ 7.

     

    The data sheet I have says:

     

    Have I misunderstood something?

     

    Best Regards.

  • They are on the secondary events CIC3.  See table 7-41.

    Best Regards,

    Chad

  • Dear Chad,

     

    Thank you for your reply.

    The example code that I have must be for primary interrupt, right?

     

    
    #include "ti/csl/csl_chip.h"
    #include "ti/csl/csl_chipAux.h"
    #include "ti/csl/src/intc/csl_intc.h"
    #include "ti/csl/csl_gpio.h"
    #include "ti/csl/csl_gpioAux.h"
    
    #include <stdio.h>
    
    CSL_IntcContext             intcContext;
    CSL_IntcEventHandlerRecord  EventHandler[30];
    CSL_IntcObj                 intcObj;
    CSL_IntcHandle              hTest;
    CSL_IntcGlobalEnableState   state;
    CSL_IntcEventHandlerRecord  EventRecord;
    CSL_IntcParam               vectId;
    
    CSL_GpioHandle  hGpio;
    
    
    volatile int a = 0;
    
    interrupt void intIsr()
    {
    	a = 1;
    
    	return ;
    }
    
    int main(void)
    {
    	int pinNum = 0;
    	int bankNum = 0;
    
        /************************************************
         *************** INTC Configuration *************
         ************************************************/
    
        printf ("Debug: GEM-INTC Configuration...\n");
    
        /* INTC module initialization */
        intcContext.eventhandlerRecord = EventHandler;
        intcContext.numEvtEntries      = 10;
        if (CSL_intcInit(&intcContext) != CSL_SOK)
        {
            printf("Error: GEM-INTC initialization failed\n");
            return;
        }
    
        /* Enable NMIs */
        if (CSL_intcGlobalNmiEnable() != CSL_SOK)
        {
            printf("Error: GEM-INTC global NMI enable failed\n");
            return;
        }
    
        /* Enable global interrupts */
        if (CSL_intcGlobalEnable(&state) != CSL_SOK)
        {
            printf ("Error: GEM-INTC global enable failed\n");
            return;
        }
    
        /* Open the INTC Module for Vector ID: 4 and Event ID: 90 (GPIO_n in C6678)*/
        vectId = CSL_INTC_VECTID_4;
        hTest = CSL_intcOpen (&intcObj, 90, &vectId , NULL);
        if (hTest == NULL)
        {
            printf("Error: GEM-INTC Open failed\n");
            return;
        }
    
        /* Register an call-back handler which is invoked when the event occurs. */
        EventRecord.handler = &intIsr;
        EventRecord.arg = 0;
        if (CSL_intcPlugEventHandler(hTest,&EventRecord) != CSL_SOK)
        {
            printf("Error: GEM-INTC Plug event handler failed\n");
            return;
        }
    
        /* Enabling the events. */
        if (CSL_intcHwControl(hTest,CSL_INTC_CMD_EVTENABLE, NULL) != CSL_SOK)
        {
            printf("Error: GEM-INTC CSL_INTC_CMD_EVTENABLE command failed\n");
            return;
        }
    
        printf ("Debug: GEM-INTC Configuration Completed\n");
    
    
    	// 1. Init Flag
    	a = 0;
    	printf("a = %d\n",a);
    
    	// 2. Trigger GPIO_0 in Core0
    	pinNum = 0;
    	bankNum = 0;
    
    	// Open the CSL GPIO Module 0
    	hGpio = CSL_GPIO_open (0);
    
    	// Set GPIO pin number 0 as an output pin
    	CSL_GPIO_setPinDirOutput (hGpio, pinNum);
    
    	// Set interrupt detection on GPIO pin 0 to rising edge
        CSL_GPIO_setRisingEdgeDetect (hGpio, pinNum);
    
        // Enable GPIO per bank interrupt for bank zero
        CSL_GPIO_bankInterruptEnable (hGpio, bankNum);
    
        // Toggle GPIO_0 pin to trigger GPIO interrupt
        CSL_GPIO_clearOutputData (hGpio, pinNum);	//GPIO_0=0
        CSL_GPIO_setOutputData (hGpio, pinNum);		//GPIO_0=1
    
    
    	// 3. Wait for entering into ISR
    	while(a!=1){}
    
    
    	printf("a = %d\n",a);
    	printf("GPIO interrupt occurs\n");
    
    	return 0;
    }
    
    

     

    Could you please explain me how I should modify the code to use GPINT7 ?

     

    Regards.

  • Please take a look at the footnote for event 90 in the table "CorePac[n] will receive GPINTn".

    In C6678, we have 8 cores and GPIO 0~7 will be connected to Core 0~7 individually by the same event #90.

    But in C6672, since we have only two cores, only GPIO 0&1 will be connected to Core 0&1. GPIO 2~7 will not connected to Core 0&1 based on our interrupt mapping in C6672.

    In CIC3, we have GPIO 0~15 events, but they are connected to EDMA3CC0 and HyperLink, not to CorePac. 

    So please use GPIO 0,1 and 8~15 in C6672 device as the GPIO event source. 

  • Thank you very much, Steven.

    Sincerely,

    JungBai Park.