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Explanation of how software code gets from CCS to SPI OR FLASH

Can someone provide a high level understanding of how a compiled software application gets from the computer running CCS to SPI NOR Flash attached to the SPI pins of the C6657?

Assuming XDS560v2 is connected from PC to target board via 60 pin connection (MIPI).

Assuming the processor is up running another application, does it halt when the emulator talks to the DSP (via JTAG) to tell it that it is going to be programmed to load the SPI?  

Thank you,

Thomas

  • Thomas,

    The out file is loaded into the memory (most probably DDR memory) and the cores are used to load this through the SPI interface. The CCS is used to connect to the core through JTAG and execute the program on the core that can take the image in the DDR and load into NOR flash.

    Thanks,

    Arun.

  • Hi Arun,

    I do not have DDR memory connected in this custom board.  The CC6657 only has a EMIF16 connected to a FPGA, a SPI memory connected for software configuration, and JTAG and EMULATION pins connected to a 60 pin MIPI for programming and emulation.

     

    Will this still work without the DDR?  Can the outfile be loaded in internal RAM of the chip?

     

    Thanks,

    Thomas