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Locating the sysbios region like semaphore, HWI, and other to different memory section

Other Parts Discussed in Thread: SYSBIOS

Hi all,

When .data and .text section is in DDR, i am trying to create a hardware interrupt and semaphore create, and its throwing an error saying 

"[C66xx_3] {module#24}: line 159: E_alreadyDefined: Hwi already defined: intr# 7

xdc.runtime.Error.raise: terminating execution"


But when the data section moved to L2Sram , able to create the hardware interrupts. So i thought that the 

same DDR section for HWI/Semaphore accessed by all the cores. So i moved the Sysbios related stuffs to L2SRAM 

by saying 

Program.sectMap[".knl: { *.*(.text:*ti_sysbios_knl*) }"] = "L2SRAM";

Program.sectMap[".hwi: { *.*(.text:*ti_sysbios*_Hwi_*) }"] = "L2SRAM";

Program.sectMap[".hwi: { *.*(.const:*ti_sysbios*_Hwi_*) }"] = "L2SRAM";

Program.sectMap[".sysbios: { *.*(.text:*ti_sysbios*) }"] = "L2SRAM";

Program.sectMap[".sysbios: { *.*(.const:*ti_sysbios*) }"] = "L2SRAM";

Program.sectMap[".sysbios: { *.*(.fardata:*ti_sysbios*) }"] = "L2SRAM";

in the cfg file.

Is anything to be moved within the corepac L2SRAM?

Thanks In Advance

Regards,

K. lakshmanan




  • Hi Lakshmana,

    If you are just trying to relocate the C66x vector table to L2SRAM, then you can do it like this:

    Program.sectMap[".vecs"] ="L2SRAM"; // Add to cfg file

    What device are you working on ?

    Best,

    Ashish

  • Dear Ashish,

    I moved the vecs section o L2SRAM also. Still facing the problem.

    I am using c6670 device.

    I am facing some issues on decalaring the global variables. I have a RTSC project in which code and data section moved to DDR memory.

    Written one C file, in which some global variables are declared. After genrating the .map file, i can see some gloabl variables is in fardata section and some are in

    near data section.

    I want to know what is the signinficance of neardat and fardata.

    When i moved the data section to DDR, i am facing the issues vect id already registered.

     

    Thanks in advance,

     

    Regards,

    K. Lakshmanan

     

     

     

     

     

     

  • Here is a link that describes NEAR and FAR in the context of C6x devices:

        http://processors.wiki.ti.com/index.php/C6000_Memory_models

    Regarding the "Hwi_E_alreadyDefined" error, this occurs when Hwi_create() is invoked referencing an interrupt number (in your case '7') that has already been used in a previous Hwi_create() call (or used to statically create a Hwi in the user's config script or by a module used by the application).

    I'm thinking that in your case, interrupt #7 has been created by one of the drivers your application is using.

    Alan

  • Hi Alan,

    Thanks for quick response. wiki link for NEAR & FAR variables was really useful.

    However coming to second part, the exception "Hwi_E_alreadyDefined" in my case is not because of using same interrupt vector id twice.

    Justification for the above statement is that I do not see this issue if Data Section (.fardata in particular) is placed inside Local L2SRAM.

    Problem appears only when Data section is placed in a common memory region (same for MSMC & DDR). Below is my current memory partitioning and section map - 

    MEMORY
    {
    MSMCSRAM (RWX) :         org = 0xc000000, len = 0x200000
    L1DSRAM (RW) :               org = 0xf00000, len = 0x8000
    L1PSRAM (RWX) :             org = 0xe00000, len = 0x8000
    SYM_CODE_L2 (RWX) :  org = 0x800000, len = 0x400
    SYM_DATA_L2 (RWX) :    org = 0x800400, len = 0x400
    L2SRAM (RWX) :                org = 0x800800, len = 0xef800
    DDR (RWX) :                      org = 0x80000000, len = 0x10000000
    }

    SECTIONS
    {
    .text: load >> DDR
    .ti.decompress: load > DDR
    .stack: load > L2SRAM
    GROUP: load > DDR
    {
    .bss:
    .neardata:
    .rodata:
    }
    .cinit: load > L2SRAM
    .pinit: load >> DDR
    .init_array: load > DDR
    .const: load >> DDR
    .data: load >> DDR
    .fardata: load >> DDR
    .switch: load >> DDR
    .sysmem: load > DDR
    .far: load >> DDR
    .args: load > DDR align = 0x4, fill = 0 {_argsize = 0x0; }
    .cio: load >> DDR
    .ti.handler_table: load > DDR
    heapMem0: load >> L2SRAM
    .symmetric_code_L2: load >> SYM_CODE_L2 align = 0x100
    .symmetric_data_L2: load >> SYM_DATA_L2 align = 0x100
    .private_data_L2: load >> L2SRAM
    .private_code_L2: load >> L2SRAM
    .shared_data_L3: load >> MSMCSRAM
    .shared_code_L3: load >> MSMCSRAM
    .shared_data_L3_cacheable: load >> MSMCSRAM
    .shared_code_DDR: load >> DDR
    .shared_data_DDR: load >> DDR
    .shared_data_DDR_Common: load >> DDR
    .csl_vect: load >> L2SRAM
    .fardata: { *.*(.fardata:ti_*) } load >> L2SRAM
    .fardata: { *.*(.fardata:*xdc_*) } load >> L2SRAM
    .fardata: { *.*(.fardata:*Qmss_*) } load >> L2SRAM
    .far.2: { *.*(.far:taskStackSection)} load >> L2SRAM
    .vecs: load >> L2SRAM
    xdc.meta: load >> L2SRAM
    .knl: { *.*(.text:*ti_sysbios_knl*) } load >> L2SRAM
    .hwi: { *.*(.text:*ti_sysbios*_Hwi_*) } load >> L2SRAM
    .hwi: { *.*(.const:*ti_sysbios*_Hwi_*) } load >> L2SRAM
    .sysbios: { *.*(.text:*ti_sysbios*) } load >> L2SRAM
    .sysbios: { *.*(.const:*ti_sysbios*) } load >> L2SRAM
    .sysbios: { *.*(.fardata:*ti_sysbios*) } load >> L2SRAM
    .xdc: { *.*(.const:*xdc_runtime*) } load >> L2SRAM
    .xdc: { *.*(.text:*xdc_runtime*) } load >> L2SRAM
    cppiSharedHeap: load >> MSMCSRAM align = 0x100

    }

    I am running same executable on 2 cores. the mentioned exception creeps in the following scenario - 

    -> Core 0 starts execution and registers a Hwi with interrupt vector Id #7.

    -> Core 0 task is blocked on semaphore and enters idle task

    -> Core 1 starts execution and throws exception as soon as it tries to register a Hwi with interrupt vector id #7.

    Correct me if I am wrong but I believe that the Interrupt vector usage information stored by Core 0 is at the same address which Core 1 is also referring for the  same purpose. hence Core 1 understands that the requested interrupt vector id is already in use and throws exception.

    If the above understanding is correct, confusion here is that even though I am placing ".vecs" in L2SRAM, why such corruption should occur.

    Requesting you to please have a look at the memory section map and bail me out of this confusion.

    Thanks in advance.

    Lakshmanan K

  • The ".vecs" section contains only the interrupt vector table.

    The alreadyDefined Error is due to there already being an entry in the Hwi module's dispatch table for interrupt #7.

    The dispatch table is NOT the same as the interrupt vector table.

    I think the dispatch table resides in the ".far" section so if you place ".far" in shared memory that would explain the problem.

    The symbol associated with the dispatch table is "ti_sysbios_family_c64p_Hwi_Module__state__V".

    Looking at your application's .map file, if this symbol is in shared memory then that is definitely the problem.

    Alan

  • Hi Alan,

    You are right, ti_sysbios_family_c64p_Hwi_Module__state__V is located in DDR memory.

    But I am not sure how exactly i can place these symbols into L2SRAM as it does not show any associated memory section. below is the text from map file - 

    80a187d4   ti_sysbios_family_c64p_Hwi_Module__state__V

    Please guide as how to move this symbol to L2SRAM.

    Thanks,

    Lakshmanan K



  • I do not know of a way to selectively place a single symbol into a specific memory segment.

    The linker allows you to place sections into memory segments, but not individual symbols within a section.

    Consequently, it seems that you'll have to place ALL of .far into memory that is NOT shared.

    Alan

  • Hi Alan,

    Thanks for your valuable suggestions. However I'd like to add few more points here to have better clarity on problem statement -

    -->  I am using "ti.sysbios.hal.Hwi" module and NOT "ti.sysbios.family.64p.Hwi"

    --> I think "ti_sysbios_family_c64p_Hwi_Module__state__V" lies in .fardata and NOT in .far section because if I place .far in L2SRAM, it has no impact on this symbols whereas moving .fardata into L2SRAM brings this symbol address into L2SRAM.

    below is a specific part of my .cfg file

    Program.sectMap[".fardata"]   = "DDR";
    Program.sectMap[".far.2:  { *.*(.fardata:ti_*)}"] = "L2SRAM";

    when I add the above statement in .cfg file, below is the part of the generated .map file -

    80a1874c   ti_sysbios_family_c64p_Hwi_Module__root__V
    008ad160   ti_sysbios_family_c64p_Hwi_Module__startupDone__F
    008ad160   ti_sysbios_family_c64p_Hwi_Module__startupDone__S
    80a18754   ti_sysbios_family_c64p_Hwi_Module__state__V
    008ac980   ti_sysbios_family_c64p_Hwi_Module_startup__E
    008ac980   ti_sysbios_family_c64p_Hwi_Module_startup__F

    80a187cc   ti_sysbios_hal_Hwi_Module__root__V
    008ad360   ti_sysbios_hal_Hwi_Module_startup__E
    008ad360   ti_sysbios_hal_Hwi_Module_startup__F

    As we can see apart from the highlighted symbols all other symbols have been push to L2SRAM.

    I am not able to understand why these specific symbols are left out in DDR whereas they also adhere to the regular expression specified

    (Program.sectMap[".far.2:  { *.*(.fardata:ti_*)}"] = "L2SRAM";)

  • Using ofd6x on a locally generated c6x applcation, I confirmed that  the "ti_sysbios_family_c64p_Hwi_Module__state__V" symbol resides in the ".fardata" section:

            <7504> "ti_sysbios_family_c64p_Hwi_Module__state__V" (defined in section ".fardata" (26))

    However, the symbol does not exist in its own named subsection of .fardata so the linker won't allow you to place it using the syntax you're using.

    The linker does allow you to place all the symbols from a particular object file into a memory segment, so what will probably work for you is to tell the linker to place all the symbols from the object file that "ti_sysbios_family_c64p_Hwi_Module__state__V" is defined in into L2SRAM.

    The symbol "ti_sysbios_family_c64p_Hwi_Module__state__V" is define in the internally generated configuration.c file.

    So, for instance, if the name of your application is TaskTest3 the syntax for placing all the symbols from your application's config object file into L2SRAM would be:

        Program.sectMap[".mydata { TaskTest3_pe66.oe66(.fardata) }"] = "L2SRAM";

    You'll have to adjust the above statement for your application, but I think it will do what you want it to do.

    Alan

  • Hi Alan,

    It worked real sweet. Thanks for help.

    Lakshmanan K