hi sirs,
I am using C6657. My question is that could Core1's LL2 cache in Core0's L1D?
If yes, could you please give me some hints or sample?
ps:
I run project A on Core1 with data section in Core1's LL2. And I use Core0 to trace project A's data which int Core1's LL2.
If Core1's LL2 could cache in Core0's L1D, Core0 could trace the data by setting the coherency between them I think.
Am I right?
Thank you in advance.
regards,
Bai