Hi,
We have a question with L138’s SPI1’s chip select function.
For ‘SPI Default Chip Select Register (SPIDEF)’, all its seven bits[7-0] CSDEF[n] as described by TRM SPRUH77 are writable. However, the register view of CCS displays only one bit CSDEF0.
We currently have only attached a single device (SPI flash) to SPI1 port, so it is difficult to test other chip select pins. But does the screenshot here means the CCS display is incorrect, or the TRM contains incorrect information?
Paul
