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CK and DQS Routing Specification for AM335x DDR3

AM335x datasheet does not define the CK and DQS Routing Specification.

Does it meet the timing requirements between CK and DQS to meet "CK and ADDR_CTRL Routing Specification" and "DQS[x] and DQ[x] Routing Specification"?

Best regards,

Daisuke

 

  • Hi Daisuke,
     
    Explanation below is based on DDR3 section (5.6.2.3) in the AM335X Datasheet, Rev.F.
     
    The CK net class is associated with the ADDR_CTRL net class. DQSx net class is associated with the DQx net class (Tables 5-64 and 5-65).
    Then for CK topology there are Figures 5-52, 5-54, 5-56, 5-58, 5-60. For DQSx topology there are Figures 5-62, 5-64.
    CK routing specifications are given in Figure 5-66 and Table 5-66. DQSx routing specifications are given in in Figure 5-67 and Table 5-67. Don't forget to check the notes below the two tables.
     
    You will find routing specifications for DDR2 and LPDDR in corresponding sections in a similar way.
  • Hi Biser,

    Thank you for your reply.

    I had some misunderstanding.
    I could understand that the routing specifications for all net classes were included in the datasheet.

    Best regards,

    Daisuke