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TMS320VC33 DSP boot up question

Charlie Zhang2
Prodigy 10 points

Other Parts Discussed in Thread: TMS320VC33

Dera TI engineers,

We have been using TMS320VC33 DSP in our products over ten years. Recently we are redesigning the circuit board to upgrade the FPGA and Flash memory chips. We kept using the VC33 DSP for FW code compatibility to meet our customers’ requirements, while changed the bootup sequence from DSP->FPGA to FPGA->DSP. The new board has been fabricated and FPGA is programmed and working as to the design. However, we are stuck when FPGA sends RESET signal to boot up the DSP. It seems the DSP somehow stopped loading the DSP code from Flash memory after successfully reading the first few words (see the signal snapshots attached). We could not understand the DSP behaviors and desperately need helps to resolve the issue. Does anyone know what happened and if there is any solution for it?

Thanks.

Charlie

8666.TI VC33 DSP Boot Up Issue.pdf

  • 0
    TI__Mastermind 23785 points

    Can you futher explain the changes? What is the meaning of "DSP->FPGA to FPGA->DSP"? Is there HW changes? Is there SW changes? What are the changes?

    Have you contacted your local TI FAE? TI FAE can use TI internal forum in case there are information that you do not want to post here.

    TMS320VC33 is an old design and is not recommended for new design. We will gather as much information as possible to help resolving this issue.

    Regards.

  • 0 in reply to Steve Tsang
    Prodigy 10 points

    Thank you Steve for your response. I did contact with local FAE, however the issue dose not get resolved yet. Would appreciate your opinion on the cause and solution of the issue.

    The change from DSP->FPGA to FPGA->DSP is a HW change, means that the DSP was initially powered-up before the FPGA and that the DSP controlled the /RST signal on the FPGA thus assuring the sequence and now, that sequence is reversed with the FPGA controlling the /RST line of the DSP.

    We did not make fundamental changes in the SW in terms of boot entry pointer and memory map. The CMD files, the compiling options, and the entire code have no change excepting the code for programming and starting up the FPGA is removed. With this SW, however, the DSP won't boot up when the FPGA set the /RST signal. 

    We may be wrong on the CMD file settings as we kept the old entry pointer and memory map. Would you please help in providing generic settings in those CMD files (using in the compiling time and used with hex30.exe)?

    We have to continue using TMS320VC33 because of the large installation base and the No-DSP-SW-Change request from our customers.

    Thanks for your support and help.

    Charlie