• State Resolved
  • Locked Locked
  • Replies 5 replies
  • Subscribers 98 subscribers
  • Views 691 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

m3video Unhandled exception when using tiler (DM816x)

Bandeg
Expert 1140 points

Hello TI:

We have code that draws on video before H264 encoding in the encLinc_common.c function named EncLink_codecQueueFramesToChQue().

It works great when we have the tiler disabled, however when we enable the tiler we get the exception below, on the very first execution.

pChObj->algObj.algCreateParams.tilerEnable is true in this function.

When using the tiler, we are calling Utils_tilerAddr2CpuAddr() to translate to the tiler address. (It also crashes if we don't translate).

We are using frame pointers from pFrame->addr[][] and note that I have logged the pFrame->addr[][] and the translated tiler address and data format.

This code also worked with the tiler enabled in DVR-RDK 2.80 and we have since migrated to DVR-RDK 03.00.01.03. 

Any ideas on where we have introduced a bug and how we can debug?

2013-05-01 12:21:29 iCVR-VS-005354 local1.info :  [m3video] TILER TEST:: addr[0,0]=0xF03C80 addr[0][1]=0x8783C80::addr[0][2]=0x0
2013-05-01 12:21:29 iCVR-VS-005354 local1.info :  [m3video]  addr[1][0]=0x0  addr[1][1]=0x0 addr[1][2]=0x0  dataFormat=0
2013-05-01 12:21:29 iCVR-VS-005354 local1.info :  [m3video] tile[0][0]=0x60F03C80, tile[0][1]=0x68783C80
2013-05-01 12:21:29 iCVR-VS-005354 local1.info :  [m3video] Unhandled Exception:
2013-05-01 12:21:29 iCVR-VS-005354 local1.info :  [m3video] Exception occurred in ThreadType_Task
2013-05-01 12:21:29 iCVR-VS-005354 local1.info :  [m3video] handle: 0x35402be0.
2013-05-01 12:21:29 iCVR-VS-005354 local1.info :  [m3video] stack base: 0x35e0e140.
2013-05-01 12:21:29 iCVR-VS-005354 local1.info :  [m3video] stack size: 0x8000.
2013-05-01 12:21:29 iCVR-VS-005354 local1.info :  [m3video] R0 = 0x6878d3d4  R8  = 0x000002c0
2013-05-01 12:21:29 iCVR-VS-005354 local1.info :  [m3video] R1 = 0x60f16b14  R9  = 0x000002c0
2013-05-01 12:21:29 iCVR-VS-005354 local1.info :  [m3video] R2 = 0x68784a54  R10 = 0x000000ab
2013-05-01 12:21:29 iCVR-VS-005354 local1.info :  [m3video] R3 = 0x60f05814  R11 = 0x00000002
2013-05-01 12:21:29 iCVR-VS-005354 local1.info :  [m3video] R4 = 0x68784a54  R12 = 0x00000019
2013-05-01 12:21:29 iCVR-VS-005354 local1.info :  [m3video] R5 = 0x00000064  SP(R13) = 0x35e15f00
2013-05-01 12:21:29 iCVR-VS-005354 local1.info :  [m3video] R6 = 0x60f05815  LR(R14) = 0x00000019
2013-05-01 12:21:29 iCVR-VS-005354 local1.info :  [m3video] R7 = 0x000000b2  PC(R15) = 0x952ee96c
2013-05-01 12:21:29 iCVR-VS-005354 local1.info :  [m3video] PSR = 0x01000000
2013-05-01 12:21:29 iCVR-VS-005354 local1.info :  [m3video] ICSR = 0x0440f803
2013-05-01 12:21:29 iCVR-VS-005354 local1.info :  [m3video] MMFSR = 0x00
2013-05-01 12:21:29 iCVR-VS-005354 local1.info :  [m3video] BFSR = 0x04
2013-05-01 12:21:29 iCVR-VS-005354 local1.info :  [m3video] UFSR = 0x0000
2013-05-01 12:21:29 iCVR-VS-005354 local1.info :  [m3video] HFSR = 0x40000000
2013-05-01 12:21:29 iCVR-VS-005354 local1.info :  [m3video] DFSR = 0x00000000
2013-05-01 12:21:29 iCVR-VS-005354 local1.info :  [m3video] MMAR = 0xe000ed34
2013-05-01 12:21:29 iCVR-VS-005354 local1.info :  [m3video] BFAR = 0xe000ed38
2013-05-01 12:21:29 iCVR-VS-005354 local1.info :  [m3video] AFSR = 0x00000000
2013-05-01 12:21:29 iCVR-VS-005354 local1.info :  [m3video] Terminating Execution...

Thanks

--B

  • 0
    TI__Guru 59700 points

    The exception is because there are no AMMU pages mapping the tiler system space address range of 0x6000_0000 to 0x7FFF_FFFF. An AMMU page is required to enable M3 access to any address. This means it is not possible to access tiler address space via CPU. Is it possible to use the dspAlg link on c674 for drawing in your case. The SWOSD is optimized for blending graphics with video.If you only require drawing grid lines you can also use the utilsDMA APIs which will work in tiler space also.

    There are only 4 AMMU large pages and in RDK 2.8 one of them was used for mapping tiler address space which is why it worked in RDK 2.8.

    In RDK 3.0 this page is used to map a different address range to reduce M3 CPU load by configuring the cache for WB_WA configuration

  • 0 in reply to Badri Narayanan
    Expert 1140 points

    Thanks for the prompt response.  We will re-evaluate our implementation.

    Can you elaborate on using the utilsDMA API.   How can we use this and from which processor?  Can we use the M3Video processor?

    Regards,

    --B

  • 0 in reply to Bandeg
    TI__Guru 59700 points

    The utils DMA interface is present under /dvr_rdk/mcfw/src_bios6/utils/utils_dma.h

    Example code for drawing grid lines is found under:

    /dvr_rdk/mcfw/src_bios6/links_m3vpss/swMs/swMsLink_drv.c

     Search for code under flag "enableLayoutGridDraw".

    If you are stuck and just want to proceed with your previous implementation you can try out below changes although it will have a major performance impact and is not recommended:

    1. Change /dvr_rdk/mcfw/src_bios6/cfg/ti816x/BIOS_m3vpss.cfg

    Program.sectMap[".bss"]                       = "DSS_M3_BSS_MAPPED_MEM";
    Program.sectMap[".neardata"]                  = "DSS_M3_BSS_MAPPED_MEM";
    Program.sectMap[".rodata"]                    = "DSS_M3_BSS_MAPPED_MEM";

    to

     

    Program.sectMap[".bss"]                       = "DSS_M3_BSS_MEM";
    Program.sectMap[".neardata"]                  = "DSS_M3_BSS_MEM";
    Program.sectMap[".rodata"]                    = "DSS_M3_BSS_MEM";

    2. Change /dvr_rdk/mcfw/src_bios6/cfg/ti816x/BIOS_m3video.cfg

    Program.sectMap[".bss"]                       = "VIDEO_M3_BSS_MAPPED_MEM";
    Program.sectMap[".neardata"]                  = "VIDEO_M3_BSS_MAPPED_MEM";
    Program.sectMap[".rodata"]                    = "VIDEO_M3_BSS_MAPPED_MEM";
    Program.sectMap[".stack"]                     = "VIDEO_M3_BSS_MAPPED_MEM";

    to

    Program.sectMap[".bss"]                       = "VIDEO_M3_BSS_MEM";
    Program.sectMap[".neardata"]                  = "VIDEO_M3_BSS_MEM";
    Program.sectMap[".rodata"]                    = "VIDEO_M3_BSS_MEM";
    Program.sectMap[".stack"]                     = "VIDEO_M3_BSS_MEM";

     

    After above two changes build dvr_rdk and confirm from the map file that "MAPPED_MEM" section is fully unused for both VIdeo M3 and VPSS M3.Run the app confirm it is functional.

     

    Next change AMMU mapping as below:

    3./dvr_rdk/mcfw/src_bios6/cfg/ti816x/AMMU_m3.cfg

    AMMU.largePages[3].pageEnabled = AMMU.Enable_YES;
    AMMU.largePages[3].logicalAddress = 0x20000000;
    AMMU.largePages[3].translatedAddress = 0x80000000;
    AMMU.largePages[3].translationEnabled = AMMU.Enable_YES;
    AMMU.largePages[3].size = AMMU.Large_512M;
    AMMU.largePages[3].L1_cacheable = AMMU.CachePolicy_CACHEABLE;
    AMMU.largePages[3].L1_posted = AMMU.PostedPolicy_POSTED;
    AMMU.largePages[3].L1_writePolicy = AMMU.WritePolicy_WRITE_BACK;
    AMMU.largePages[3].L1_allocate = AMMU.AllocatePolicy_ALLOCATE;
    AMMU.largePages[3].L2_cacheable = AMMU.CachePolicy_NON_CACHEABLE;
    AMMU.largePages[3].L2_posted = AMMU.PostedPolicy_NON_POSTED;

    to

    AMMU.largePages[3].pageEnabled = AMMU.Enable_YES;
    AMMU.largePages[3].logicalAddress = 0x60000000;
    AMMU.largePages[3].translatedAddress = 0x60000000;
    AMMU.largePages[3].translationEnabled = AMMU.Enable_YES;
    AMMU.largePages[3].size = AMMU.Large_512M;
    AMMU.largePages[3].L1_cacheable = AMMU.CachePolicy_CACHEABLE;
    AMMU.largePages[3].L1_posted = AMMU.PostedPolicy_POSTED;
    AMMU.largePages[3].L1_writePolicy = AMMU.WritePolicy_WRITE_BACK;
    AMMU.largePages[3].L1_allocate = AMMU.AllocatePolicy_ALLOCATE;
    AMMU.largePages[3].L2_cacheable = AMMU.CachePolicy_NON_CACHEABLE;
    AMMU.largePages[3].L2_posted = AMMU.PostedPolicy_NON_POSTED;

    Rebuild firmware again and now access to tiler system address space oc 0x6000_0000 to 0x8000_0000 should work. You _have_ to convert tilerAddr2CpuAddr before using it.

  • 0 in reply to Badri Narayanan
    Expert 1140 points

    Thanks,

    We are reviewing our options.

    How can we compare the performance impacts? What should we look for?

    Regards,

    --B

  • 0 in reply to Bandeg
    TI__Guru 59700 points

    Performance impact will be in terms of increase in M3 Mhz. You can check the loading of M3 video and M3 vpss using Vsys_printDetailedStatistics.LOad is printed on the console. If your usecase is demanding like 16 channel DVR then M3 Mhz is one of the bottlenecks to realizing full realtime performance. If you are not bottlenecked by M3 Mhz then it may not be an issue.HOwevevr it is better to always use DMA rather than CPU to draw grid lines