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AM3359 USB Peripheral Boot Problems at init

Other Parts Discussed in Thread: AM3359

Hi,

My board is a custom design based upon a BeagleBone reference. It is running and it is extremely close to booting,

but I just can't seem to get over this hurdle. Please let me know what you think.

Events based upon the TI AM335X board bring up tips document:

Power Sequencing

  • TPS65217B power rails OK
  • CLKS OK
  • POR/RESET OK

Is the device alive?

  • Cs at com port OK
  • CCS_5 connect OK
  • Init sequence successful on CCS_5 console

Boot sequence (w/microSD removed)

  • SYS_BOOT values match BB at control Status Register (0x44E10040 00400317 )
  • PC somewhere  in 0x20000-0x2c000
  • Custom board in 0x23xxx; BB in 0x27xxx

Peripheral/Memory Booting Issues

  • Verified microSD CLK
  • Does not boot from known good microSD image without CCS_5 connection (removed microSD again)

DDR configuration

  • DDR2 appears solid. Various memory fills and dumps with various bit patterns OK – no diagnostic yet)

Still having issues

  • Possible USB0 problems (see tracing vector info below)
  • USB0_VBUS seems to function similar to BB (measures 4.372V, BB measures 4.312V)
  • Change PU value to bump USB0_VBUS to 4.6V (above 4.4V threshold - no change)
  • Before CCS_5 connect, FTDI USB map tool successfully reads USB0 TI attributes. (to me, indicates good USB0 polarity)
  • After CCS_5 connect, FTDI USB map tool can’t read anything-no device found
  • Try to access USB0 registers, nothing there (CCS_5 reads BB USB0 regs OK)

Further information –tracing vectors

  • Starts PB; booting loop failed to reach the last device; PB failed
  • bad custom trace vectors

0x4030CE40 0000103F

0x4030CE44 00001000

0x4030CE48 00011000

  • good BB trace vectors

0x4030CE40 0000907F

0x4030CE44 000010D0

0x4030CE48 00111000

 

 

 

  • Hello Clay,

    Just to be clear...are you only having trouble booting from USB? Does the board boot from another boot source?

  • Clay,

    appreciate the details.  Let's see if we can get you over the hump.

    -Are you using XDS100 to connect JTAG (USB cable) or XDS560 (JTAG header)?

    -After boot fails, you say you are stuck at addresses in the 0x23000 range.  Can you tell us specifically what addresses it is executing?

    -When you try to boot from SD, do you see any boot messages on the console?  Do you see C's?  

    Regards,

    James

  • Hi DK,

    The microSD image is the only boot source I have at the moment. I'm thinking about changing the boot list to exclude USB just to see if I get new info and maybe USB

    register access.

    I'm not trying to actually boot from USB, I'm just comparing "apple to apple" trace vectors with the BeagleBone reference.

    The vectors indicate to me that it did not complete the Peripheral Boot loop and since UART functions and Ethernet is not in the boot list,

    that is why I have concerns with USB.

    I assume the microSD image eventually requires a functional USB0 to get the mass storage option to function as the BeagleBone does.

    Again, the FTDI USBview is happy with USB0, until I connect with CCS_v5, which I need to access the trace vectors.

    Thanks for the quick reply.

  • Hi James,

    I am using an XDS100 via USB cable.

    In the course of this reply, circumstance had me try the 2nd board with interesting results. 1st, it connected in the 0x402F069X range w/SD installed.

    After opening the a Real-term console window for the 2nd board with the SD installed, and connecting w/CCS_5, I get a message similar to the following:

    U-boot SPL, 2011.09-00053-gb423c52 <date>

    Texas Instruments Revision detection unimplemented

    Incorrect magic number in EEPROM

    read_eeprom<> failure. continuing with DDR3

    After a CCS_5 disconnect, I get even more specific info related to Uboot and Linux.

    This message indicates the magic number is 0xee3355aa, but doesn't indicate where it belongs, other than EEPROM.

    Is this indeed the magic number and where (what address) does it belong?

    The original board connects at the same 0x233XX range, even with the SD installed.

    FYI, the original board Real-term console outputs Cs with no SD installed, but no Cs with SD installed. (your original question)

    Waiting for your reply - Thanks.

  • Hi James,

    What address is the AM3359 I2c EEPROM located at and can I manually update it with simple memory access commands using CCS_5?

  • Hi Clay,

    You can't get to the I2C EEPROM with just CCS5.  You will have to use code to perform the correct I2C sequences.  This link has a way to do it with uboot.

    https://groups.google.com/forum/?fromgroups=#!topic/beagleboard/lOeeX8fe0xU

    Check the beaglebone HW users guide to see how the I2C EEPROM is mapped (i think it is address 0x50).

    For a custom board, i think you can skip all of the EEPROM detection anyway.  This is on the board to identify different development boards and CAPE boards attached to beaglebone.  If you don't have any of that with your board, you should be able to modify the code to skip over it.

    Regards,

    James

    http://processors.wiki.ti.com/index.php/AM335x_General_Purpose_EVM_HW_User_Guide

  • Hi James,

    Thanks for the info.

    I can read using U-boot I2C commands, but I can't write.

    This is the same problem that prompted the post for the link you sent me. My BeagleBone has the same problem, so it is likely a problem with my U-boot image.

    Can you point me in the right direction for a good U-boot source?

    Please don't forget about the init problem on my 1st prototype. There is lots of historical and trace info included on previous posts.

  • Hi Clay, if you referenced the Beaglebone for your design, your best uboot source would be beaglebone.org.  looks like you can get the latest images here:  http://beagleboard.org/Getting%20Started#update

    Going back to your 1st proto, since you get no Cs with the microSD installed, it looks like it is reading what it believes to be a valid image out of the card, but getting stuck somewhere in the bootloader.  What is the PC in this case? 

    Regards,

    James

  • Hi James,

    Is a BB U-boot a separate image or is it integrated into an angstrom image located on the SD card? The link you gave me concerns the latest BB angstrom image.

    Has the U-boot I2C SEEPROM write issue been addressed in the latest BB angstrom image?

    FYI, I removed the magic number SEEPROM from my BB and installed it on my 2nd board. At least in terms of SD access and functionality,

    my 2nd board now acts just like a BB.

    The first board, no CCs w/SD installed, connects at around 0x233ac, but it also has connected at 0x233f4, 0x233be, 0x233c0.

    W/o SD installed I've seen, 0x233be, 0x233f8 and 0x233d0. Hopefully, this provides enough info to give me an idea of what kind of fault I might look for.

    Thanks.