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H264 HP encode issue for c6678 using video mcsdk

Hi TI folks,

I am using CCS v5.2.1.18. MCSDK is 2-1-2-5 and video mscsdk is 2.1.0.8. I am running the H264 HP encoder as baseline. I am trying to run multiple test cases of the encoder application. I do that by specifying the different test cases configuration files in the text file testcases.txt.

Each of my test cases changes the number of cores I want to run over.

For example, I want to encode a particular data file using 1, 2, 3…up to 8 cores so I put 8 lines in the testcases.txt with each line making use of its own encoder config file. What I am finding is that after it runs one test case, I am not able to run another test case to completion. It just ends up spinning on barrier 5 as some of the threads have not reached that barrier. This has to do with the fact that I am changing the number of cores in each test case. So for example in my first test case, I have 8 cores running and then in the second case I have 7 cores to do the processing but actually it would appear that the “ShmemTab” is initialised on all cores and not one less core as I would expect. Can you help? I just want to have one less core running after I complete the first test case as the second test case has one less core so it would then not be waiting on the barrier I would think. The same issue happens if I change the order and increase the number of cores for each test case so for example the first test case uses 1 core, second uses 2 and so on.

Any insight please.

Thanks, Aamir

  • Hi Aamir,

    As you observed, when there are multiple test cases, each of them must have the same number of cores with the current implementation. In C6678 multi-core codecs (such as H264HP encoder you are using), a single software barrier is used to sync up the cores, both inside the codec and in the application framework. 

    For the sync-up inside the codec, it is possible to pass different "nCores" for each of the test cases.

    However, in order for the framework to use different "nCores" for different test cases in a single run, we have to sync up all the cores that can be possibly involved in all the test cases. For example, there are 2 cores [core 0 & 1] in test case 1, and 3 cores [core 0 & 1 & 2] in test case 2. In order to run both test cases in a single run, we need to load .out to core 0 & 1 & 2 from the very beginning, and then sync up all these 3 cores to go through test case 1 and then test case 2. So, for test case 1, framework needs to set up a software barrier for 3 cores, while codec expects only two cores on the barrier.

    Thanks,

    Hongmei

  • Hongmei,

    So what you are suggesting is that I modify the application framework code to signify that I am using 8 cores but at the same time use the parameter passed in for ncores and the mapping of master and slaves from the cfg file which is then used by the codec only? Or is it that I can do this without modifying the application framework code and just make some changes in the cfg file like specifying ncores=8 but the mapping being 0 for case 1; 0,1 for case 2 and so on?

    Aamir

  • Hi Aamir,

    Just modifying the .cfg file will not work. Application framework code must be modified in order to use different number of cores for different test cases. I am assuming you would like to have all the 8 cores loaded and running. For each test case, you can pass its ncores and core team members to the codec (as in .cfg). In the framework code, we need to have the same set of cores synced up for the encoding. Meanwhile, some sync-up mechanism is also required to exclude the remaining cores from participating in the current encoding, while those cores also need to be synced up for possible encoding in a future test case.

    Thanks,

    Hongmei

  • Hongmei,

    Do you have a sample of what the h264hpvenc_ti_testapp.c will look like as it be a great help rather than trying to modify and debugging my changes for verification?

    Aamir

  • Hi Aamir,

    We do not have sample h264hpvenc_ti_testapp.c which implements this. But you can try the following idea.

    Declare a global testId on non-cached DDR. Only core 0 writes this global testID. The other cores will just read it. Additionally, each of the other cores maintain a local test id, which is initialized as 0. 

    Initially global testId is set as -1.

    At the beginning of " while(!feof(fTestCasesFile))", the non-0 cores (i.e., core 1, 2,...)  will just busy wait if their local test id is not equal to the global test id. When core 0 comes to the same loop, it increments the global testId by 1. With this, the other cores no long busy wait and then read the configuration file. If a particular core is not in the core team, it just increment its local testId, and then go to beginning of the while loop and busy wait. If a core is in the core team, it proceeds further to do the encoding. After the encoding is done, the core increment its local testId also. Core 0 will always participates in the encoding and after the encoding is done, it increments the global testId.

    /* Check if the core is in the coreTeamMap*/

    for(i=0; i<gConfig.nCores; i++) {
      if(CORE_TEAM_MAPPING[i]==DNUM) {
        break;
      }
    }
    /* go to beginning of while loop */
    if(i>=gConfig.nCores) {

    localTestId++;

    goto TEST_CASE_WHILE_LOOP;
    }

    With the above code addition, the cores participating in the encoding can keep using software barrier to sync up, for both the codec and the application framework.

    Please give it a try, and let us know how it works.

    Thanks,

    Hongmei

  • Hi Aamir,

    How is it progressing with the above changes? Please let us know if it works or any further help is needed.

    Thanks,

    Hongmei