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when DM368 SPI read and video decode simultaneously, sometime SPI read hang

Jammy Dane
Intellectual 350 points

Hi all,

the background  is 1) using dm368 board receiving video data from spi interface; 2) decode the received video data and display it; 3) the video data is encoded and transmitted by another dm368 board which using spi interface too; 4)these two board is spi master all, but decode board uses external clock, and the other board uses internal clock, so the data can be transferred from encode board to decode board; 5) the spi driver i used is spidev, dma mode, 8 bits per word, 2MHz clock.

the problem i am facing is :

at most time, the data can be read correctly and in time, but some time it hang, the following message is console log when spi read hang:

Backtrace:
[<c036bf60>] (schedule+0x0/0x380) from [<c036c91c>] (schedule_timeout+0x24/0x220)
[<c036c8f8>] (schedule_timeout+0x0/0x220) from [<c036c774>] (wait_for_common+0xf4/0x1bc)
 r7:7fffffff r6:c2d81e9c r5:c206e640 r4:c2d81e58
[<c036c680>] (wait_for_common+0x0/0x1bc) from [<c036c8cc>] (wait_for_completion+0x18/0x1c)
[<c036c8b4>] (wait_for_completion+0x0/0x1c) from [<c0220f70>] (spidev_sync+0xac/0xc8)
[<c0220ec4>] (spidev_sync+0x0/0xc8) from [<c0221118>] (spidev_read+0x8c/0xf0)
 r5:c2d81ec0 r4:c2d81f08
[<c022108c>] (spidev_read+0x0/0xf0) from [<c009f470>] (vfs_read+0xb8/0x164)
[<c009f3b8>] (vfs_read+0x0/0x164) from [<c009f5e0>] (sys_read+0x44/0x70)
 r8:40b3de0c r7:0000000c r6:c2954400 r5:00000000 r4:00000000
[<c009f59c>] (sys_read+0x0/0x70) from [<c002df40>] (ret_fast_syscall+0x0/0x28)
 r8:c002e0c4 r7:00000003 r6:40b3f684 r5:00000002 r4:00000002

when i close the video decode thread, the spi read is ok.

the reason i think is dma problem with spi read and video decode, am i right? and how can i fix it?

thank you all.

  • 0
    Guru 31670 points

    Jammy,

    Can you disable DMA support in SPI driver and give a try? If this works, can you dump the DMA parameters before and after? See whether DMA parameters are getting overwritten or corrupted by someone else?

  • 0 in reply to Renjith Thomas
    Intellectual 350 points

    thanks for reply.

    1, I have tried to disable DMA and used pio mode, but the cpu rate is very high and the data loss more, so I think pio mode is not suitable for large data transfer.

    2, i think the spi driver (spidev) in dm365 is a complicated framework, how can i dump the dma? can you expain me?

    thank you very much!!!

  • 0 in reply to Jammy Dane
    Guru 31670 points

    Jammy,

    The EDMA framework is not so simple in the DVSDK stack. But you can dump the registers by using the tool "devmem2" by specifying the physical addresses of the DMA registers. 

  • 0 in reply to Renjith Thomas
    Intellectual 350 points

    Thanks for your reply again!

    These days I have tested again and again, and I found that the problem is none of video decoding business, because when I close the decode engine the problem is going on. when I use oscilloscope, I found that sometimes the SPI read time is longer than it should be, there is a graph described it:

    As the graph shows, clock I used is 1MHz, video data speed is 500kbps, the data is transmitted every 125kbytes in 125ms, most time the read is right, but some time the read time is longer than is should be. Why?

    I think the SPI lost clock, am I right? How can I fix it?

    Furthermore, when I raise the clock, for example, set the clock 5MHz, the wrong read happened is less; or when I down the data rate, for example, set the data rata as 256kbps, then the wrong read happened less either.

    Waiting for your further advices.

  • 0 in reply to Jammy Dane
    Guru 31670 points

    Jammy,

    From this description it looks to me that you are not facing the crash that you've reported in the first post any more. Can you confirm this?

    Also can you capture the real waveform of clock, data CS and the GPIO. I'm asking this because I'm not able to match the timing of GPIO with DATA and CS. 

    Also can you share more information about your software stack? 

  • 0 in reply to Renjith Thomas
    Intellectual 350 points

    Hi Renjith,

    thank you for your repley.

    1 yes, the problem now i facing is not the reported in the first post.

    2 the figure i post is similar with the real waveform,

    (1) the clock is external and send by SPI master board ( video encode board );

    (2) when the data comes, the CS is high, if there is no data, and the CS is Low;

    (3) when the CS is high, the SPI read start, and the read count is fixed by 125kbyes, the GPIO signal is set to 1 when i start read, and is set to 0 when the read process finished.

    3 software stack:

    (1) linux 2.6.32.17

    (2) dmai_2_20_00_15

    (3) dvsdk_dm36x-evm_4_02_00_06

    waiting for your advice.

  • 0 in reply to Jammy Dane
    Guru 31670 points

    Jammy,

    Since the data is sent by the DM368 master being video data, I don't think any one can guarantee the availability of 125KB of data one shot. It really depends on the bit rate encoded. So, have you tried to reduce the chunk size and saw the behavior?