We are working with a TMS320DM6467 device feeding audio into the McASP0 port. We have a suitable clock signals on ACLKR0, and on AFSR0 and data on AXR0[1]. We find that the McASP device does not function until we also put a clock on the AHCLKR0 pin (which was initially unconnected).
Unfortunately, this has not been tracked in on the PCB, but we have managed to get the device working by routing the internal 27MHz AUXCLK into the programmable high clock divider, setting the divide ratio to 0 i.e. divide by 1, then routing this clock to AHCLKR0 with HCLKRP = 1. This appears to make the McASP device work however bearing in mind this clock is not at an audio clock rate and is asynchronous to the audio clock on ACLKR0, is this a valid fix, or is this going to cause subtle audio problems that we have not seen yet?
We are not using the clock check failure interrupt functionality.
