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AM3359 Breakpoint doesn't halt dmtimer

Paul Quevedo
Prodigy 10 points

I'm on a beaglebone running chibiOS and debugging via usb with openOCD. I've setup DMTIMER_1MS as my tick source. When I hit a breakpoint I notice that the timer continues to run and issue interrupts to the halted A8. Any attempts to single step result in a jump to my irq exception handler. I realize the functional clock to the timer module is coming from the PRCM (M3 chip). Is there a way to force the M3 to halt as well or at least gate the clock to the timer module so I can single step? Is this a configuration issue where I'm just not setting up something correctly or an issue with the way openOCD is halting the processor? Any help is appreciated. Thanks

  • 0
    TI__Mastermind 25235 points

    Hi Paul,

    Please read section 27.1.1 Debug Suspend Support for Peripherals of the AM335x TRM. The DMTimer peripherals support Debug Suspend, which means that they can be suspended when the CPU is halted for debug.

    There is, however, this topic: http://e2e.ti.com/support/arm/sitara_arm/f/791/p/259786/924247.aspx

    The guy is not able to access these registers with silicon revision 1.0. I can also confirm this issue. I currently don't have any revision 2.0 devices, but I have asked for support on this, so hopefully there will be an answer soon.

    Which silicon revision do you have? Please share if you are able to access the DebugSS registers.

    Best regards,
    Miroslav

  • 0 in reply to Miroslav Kiradzhiyski XID
    TI__Guru* 91275 points

    Paul,

    Here is some information that should clear up your questions:

    First, there is a omission in the TRM.  The base address of the Suspend Control Registers described in Ch 27 is 0x4B16_0000 (eg, the Watchdog_Timer_Suspend_Control register is 0x4B16_0200).  This will be fixed in the next TRM revision.

    These registers should work in all silicon revisions of AM335x.

    Second,

    there are 2 things you must do to stop the timer during a CCS breakpoint

    1) set EMUFREE=0.  This will allow the Suspend_Control signal from the Debug Subsystem (described below) to control the stop/start of the timer.  Note that if EMUFREE=1, the Suspend_Control signal will be ignored and the timer will be free running.  This EMUFREE bit gives local control from a module perspective to gate the suspend signal coming from the debug module.  Several modules have this feature.

    2) set the xxx_Suspend_Control register = 0x9.  These registers are described in Chapter 27 (in RevH of the TRM).  Choose the one appropriate to the peripheral you want to suspend during a breakpoint.  As noted above, note that there is a mistake in the TRM for the base address of these registers.  

    I will try to clear up the description for the next revision of the TRM.

    Regards,

    James