When each Enabled bit in the GPMC_IRQENABLE register is 0 (interrupt is masked), can each Status bit in the GPMC_IRQSTATUS register be monitored by Software Polling?
Best regards,
Daisuke
This thread has been locked.
If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.
When each Enabled bit in the GPMC_IRQENABLE register is 0 (interrupt is masked), can each Status bit in the GPMC_IRQSTATUS register be monitored by Software Polling?
Best regards,
Daisuke
Hi Daisuke,
The TRM doesn't state anything about the bits in the GPMC_IRQENABLE register affecting the bits in the GPMC_IRQSTATUS register. They just mask/unmask the module internal sources of interrupt. Therefore I believe that you shouldn't have any problems using software polling.
Best regards,
Miroslav
Hi Miroslav,
Thank you for your reply.
Sorry for my late reply.
Best regards
Daisuke