Hi everyone,
I'm trying to change VOUT1 from HDMI to DVO1.
I need to connect VOUT1 to externel fpga( 20-bit ycbcr/discrete sync) on my DM8148 custom board.
I've changed pinmux settings and sysfs configurations like below.
The gstreamer pipeline below runs without errors, but our display which is connected to the fpga shows nothing.
gst-launch -epv --gst-debug=2 filesrc location=./data/videos/dm816x_1080p_demo.264 ! 'video/x-h264' ! h264parse access-unit=true ! omx_h264dec ! 'video/x-raw-yuv-strided,format=(fourcc)NV12,width=1920,height=1080,framerate=(fraction)60/1' ! omx_scaler ! omx_ctrl display-mode=OMX_DC_MODE_1080P_60 ! gstperf ! v4l2sink min-queued-bufs=2 sync=false
Is there something wrong with the settings, or something I have missed?
Please give me some advice.
<sysfs configuration>
echo 1080p-60 > /sys/devices/platform/vpss/display0/mode
echo doublediscrete,yuv422spuv,0/0/0/0 > /sys/devices/platform/vpss/display0/output
echo 148500,1920/88/148/44,1080/4/36/5,1 > /sys/devices/platform/vpss/display0/timings
#cat /sys/kernel/debug/omap_mux/vout1*
name: vout1_avid.vout1_avid (0x48140b38/0xb38 = 0x0001), b NA, t NA
mode: OMAP_PIN_OUTPUT | OMAP_MUX_MODE1
signals: vout1_avid | gmii1_rxer | vin1_clk0 | NA | NA | uart4_rtsn_mux2 | timer6_mux1 | gpio2_31
name: vout1_b_cb_c0.vout1_b_cb_c0 (0x48140ab0/0xab0 = 0x0001), b NA, t NA
mode: OMAP_PIN_OUTPUT | OMAP_MUX_MODE1
signals: vout1_b_cb_c0 | cam_vs | NA | pata_iordy | gpmc_a_10_mux1 | uart2_txd_mux0 | NA | gpio0_27_mux0
name: vout1_b_cb_c1.vout1_b_cb_c1 (0x48140aac/0xaac = 0x0001), b NA, t NA
mode: OMAP_PIN_OUTPUT | OMAP_MUX_MODE1
signals: vout1_b_cb_c1 | cam_hs | NA | pata_dmarq | gpmc_a_9_mux1 | uart2_rxd_mux0 | NA | gpio0_26_mux0
name: vout1_b_cb_c2.vout1_b_cb_c2 (0x48140b98/0xb98 = 0x0001), b NA, t NA
mode: OMAP_PIN_OUTPUT | OMAP_MUX_MODE1
signals: vout1_b_cb_c2 | gpmc_a_0_mux1 | vin1a_d7 | NA | hdmi_cec_mux1 | spi2_d_0_mux1 | NA | gpio3_30_mux1
name: vout1_b_cb_c3.vout1_b_cb_c3 (0x48140b3c/0xb3c = 0x0001), b NA, t NA
mode: OMAP_PIN_OUTPUT | OMAP_MUX_MODE1
signals: vout1_b_cb_c3 | gmii1_rxclk | vin1a_d0 | NA | NA | uart4_ctsn_mux2 | NA | gpio3_0
name: vout1_b_cb_c4.vout1_b_cb_c4 (0x48140b40/0xb40 = 0x0001), b NA, t NA
mode: OMAP_PIN_OUTPUT | OMAP_MUX_MODE1
signals: vout1_b_cb_c4 | gmii1_rxd0 | vin1a_d1 | NA | NA | uart4_rxd_mux2 | NA | gpio3_1
name: vout1_b_cb_c5.vout1_b_cb_c5 (0x48140b44/0xb44 = 0x0001), b NA, t NA
mode: OMAP_PIN_OUTPUT | OMAP_MUX_MODE1
signals: vout1_b_cb_c5 | gmii1_rxd1 | vin1a_d2 | NA | NA | uart4_txd_mux2 | NA | gpio3_2
name: vout1_b_cb_c6.vout1_b_cb_c6 (0x48140b48/0xb48 = 0x0001), b NA, t NA
mode: OMAP_PIN_OUTPUT | OMAP_MUX_MODE1
signals: vout1_b_cb_c6 | gmii1_rxd2 | vin1a_d3 | NA | NA | uart3_rxd_mux1 | NA | gpio3_3
name: vout1_b_cb_c7.vout1_b_cb_c7 (0x48140b4c/0xb4c = 0x0001), b NA, t NA
mode: OMAP_PIN_OUTPUT | OMAP_MUX_MODE1
signals: vout1_b_cb_c7 | gmii1_rxd3 | vin1a_d4 | NA | NA | uart3_txd_mux1 | NA | gpio3_4
name: vout1_b_cb_c8.vout1_b_cb_c8 (0x48140b50/0xb50 = 0x0001), b NA, t NA
mode: OMAP_PIN_OUTPUT | OMAP_MUX_MODE1
signals: vout1_b_cb_c8 | gmii1_rxd4 | vin1a_d5 | NA | NA | i2c3_scl_mux3 | NA | gpio3_5
name: vout1_b_cb_c9.vout1_b_cb_c9 (0x48140b54/0xb54 = 0x0001), b NA, t NA
mode: OMAP_PIN_OUTPUT | OMAP_MUX_MODE1
signals: vout1_b_cb_c9 | gmii1_rxd5 | vin1a_d6 | NA | NA | i2c3_sda_mux3 | NA | gpio3_6
name: vout1_clk.vout1_clk (0x48140b2c/0xb2c = 0x0001), b NA, t NA
mode: OMAP_PIN_OUTPUT | OMAP_MUX_MODE1
signals: vout1_clk | gmii1_txclk | vin1_hsync0 | pata_hddir_mux0 | NA | NA | NA | gpio2_28
name: vout1_fid.vout1_fid (0x48140ab4/0xab4 = 0x0001), b NA, t NA
mode: OMAP_PIN_OUTPUT | OMAP_MUX_MODE1
signals: vout1_fid | cam_fld | cam_de_mux0 | pata_intrq | gpmc_a_11_mux1 | uart2_ctsn | NA | gpio0_28_mux0
name: vout1_g_y_yc0.vout1_g_y_yc0 (0x48140aa0/0xaa0 = 0x0001), b NA, t NA
mode: OMAP_PIN_OUTPUT | OMAP_MUX_MODE1
signals: vout1_g_y_yc0 | cam_d2 | NA | pata_da2 | gpmc_a_6_mux1 | uart4_txd_mux0 | NA | gpio0_23_mux0
name: vout1_g_y_yc1.vout1_g_y_yc1 (0x48140a9c/0xa9c = 0x0001), b NA, t NA
mode: OMAP_PIN_OUTPUT | OMAP_MUX_MODE1
signals: vout1_g_y_yc1 | cam_d3 | NA | pata_dmackn | gpmc_a_5_mux1 | uart4_rxd_mux0 | NA | gpio0_22_mux0
name: vout1_g_y_yc2.vout1_g_y_yc2 (0x48140b8c/0xb8c = 0x0001), b NA, t NA
mode: OMAP_PIN_OUTPUT | OMAP_MUX_MODE1
signals: vout1_g_y_yc2 | gpmc_a_13_mux1 | vin1a_d21 | pata_d13 | hdmi_ddc_scl_mux1 | spi2_cs2 | i2c2_scl_mux2 | gpio3_20
name: vout1_g_y_yc3.vout1_g_y_yc3 (0x48140b58/0xb58 = 0x0001), b NA, t NA
mode: OMAP_PIN_OUTPUT | OMAP_MUX_MODE1
signals: vout1_g_y_yc3 | gmii1_rxd6 | vin1a_d8 | pata_d0 | NA | NA | NA | gpio3_7
name: vout1_g_y_yc4.vout1_g_y_yc4 (0x48140b5c/0xb5c = 0x0001), b NA, t NA
mode: OMAP_PIN_OUTPUT | OMAP_MUX_MODE1
signals: vout1_g_y_yc4 | gmii1_rxd7 | vin1a_d9 | pata_d1 | NA | NA | NA | gpio3_8
name: vout1_g_y_yc5.vout1_g_y_yc5 (0x48140b60/0xb60 = 0x0001), b NA, t NA
mode: OMAP_PIN_OUTPUT | OMAP_MUX_MODE1
signals: vout1_g_y_yc5 | gmii1_rxdv | vin1a_d10 | pata_d2 | NA | NA | NA | gpio3_9
name: vout1_g_y_yc6.vout1_g_y_yc6 (0x48140b64/0xb64 = 0x0001), b NA, t NA
mode: OMAP_PIN_OUTPUT | OMAP_MUX_MODE1
signals: vout1_g_y_yc6 | gmii1_gtxclk | vin1a_d11 | pata_d3 | NA | NA | NA | gpio3_10
name: vout1_g_y_yc7.vout1_g_y_yc7 (0x48140b68/0xb68 = 0x0001), b NA, t NA
mode: OMAP_PIN_OUTPUT | OMAP_MUX_MODE1
signals: vout1_g_y_yc7 | gmii1_txd0 | vin1a_d12 | pata_d4 | NA | NA | NA | gpio3_11
name: vout1_g_y_yc8.vout1_g_y_yc8 (0x48140b6c/0xb6c = 0x0001), b NA, t NA
mode: OMAP_PIN_OUTPUT | OMAP_MUX_MODE1
signals: vout1_g_y_yc8 | gmii1_txd1 | vin1a_d13 | pata_d5 | NA | NA | NA | gpio3_12
name: vout1_g_y_yc9.vout1_g_y_yc9 (0x48140b70/0xb70 = 0x0001), b NA, t NA
mode: OMAP_PIN_OUTPUT | OMAP_MUX_MODE1
signals: vout1_g_y_yc9 | gmii1_txd2 | vin1a_d14 | pata_d6 | NA | NA | NA | gpio3_13
name: vout1_hsync.vout1_hsync (0x48140b30/0xb30 = 0x0001), b NA, t NA
mode: OMAP_PIN_OUTPUT | OMAP_MUX_MODE1
signals: vout1_hsync | gmii1_col | vin1_vsync0 | pata_hddir_mux1 | spi3_d_1_mux2 | uart3_rtsn_mux1 | NA | gpio2_29
name: vout1_r_cr0.vout1_r_cr0 (0x48140aa8/0xaa8 = 0x10001), b NA, t NA
mode: OMAP_PIN_OUTPUT | OMAP_MUX_MODE1
signals: vout1_r_cr0 | cam_d0 | NA | pata_da0 | gpmc_a_8_mux1 | uart4_rtsn_mux0 | NA | gpio0_25_mux0
name: vout1_r_cr1.vout1_r_cr1 (0x48140aa4/0xaa4 = 0x10001), b NA, t NA
mode: OMAP_PIN_OUTPUT | OMAP_MUX_MODE1
signals: vout1_r_cr1 | cam_d1 | NA | pata_da1 | gpmc_a_7_mux1 | uart4_ctsn_mux0 | NA | gpio0_24_mux0
name: vout1_r_cr2.vout1_r_cr2 (0x48140b94/0xb94 = 0x10001), b NA, t NA
mode: OMAP_PIN_OUTPUT | OMAP_MUX_MODE1
signals: vout1_r_cr2 | gpmc_a_15_mux1 | vin1a_d23 | pata_d15 | hdmi_hpd_mux1 | spi2_d_1_mux1 | NA | gpio3_22
name: vout1_r_cr3.vout1_r_cr3 (0x48140b90/0xb90 = 0x10001), b NA, t NA
mode: OMAP_PIN_OUTPUT | OMAP_MUX_MODE1
signals: vout1_r_cr3 | gpmc_a_14_mux1 | vin1a_d22 | pata_d14 | hdmi_ddc_sda_mux1 | spi2_sclk_mux1 | i2c2_sda_mux2 | gpio3_21
name: vout1_r_cr4.vout1_r_cr4 (0x48140b74/0xb74 = 0x10001), b NA, t NA
mode: OMAP_PIN_OUTPUT | OMAP_MUX_MODE1
signals: vout1_r_cr4 | gmii1_txd3 | vin1a_d15 | pata_d7 | NA | spi3_cs1 | NA | gpio3_14
name: vout1_r_cr5.vout1_r_cr5 (0x48140b78/0xb78 = 0x10001), b NA, t NA
mode: OMAP_PIN_OUTPUT | OMAP_MUX_MODE1
signals: vout1_r_cr5 | gmii1_txd4 | vin1a_d16 | pata_d8 | NA | spi3_sclk_mux1 | NA | gpio3_15
name: vout1_r_cr6.vout1_r_cr6 (0x48140b7c/0xb7c = 0x10001), b NA, t NA
mode: OMAP_PIN_OUTPUT | OMAP_MUX_MODE1
signals: vout1_r_cr6 | gmii1_txd5 | vin1a_d17 | pata_d9 | NA | spi3_d_1_mux1 | NA | gpio3_16
name: vout1_r_cr7.vout1_r_cr7 (0x48140b80/0xb80 = 0x10001), b NA, t NA
mode: OMAP_PIN_OUTPUT | OMAP_MUX_MODE1
signals: vout1_r_cr7 | gmii1_txd6 | vin1a_d18 | pata_d10 | NA | spi3_d_0_mux1 | NA | gpio3_17
name: vout1_r_cr8.vout1_r_cr8 (0x48140b84/0xb84 = 0x10001), b NA, t NA
mode: OMAP_PIN_OUTPUT | OMAP_MUX_MODE1
signals: vout1_r_cr8 | gmii1_txd7 | vin1a_d19 | pata_d11 | NA | uart5_rxd_mux2 | NA | gpio3_18
name: vout1_r_cr9.vout1_r_cr9 (0x48140b88/0xb88 = 0x10001), b NA, t NA
mode: OMAP_PIN_OUTPUT | OMAP_MUX_MODE1
signals: vout1_r_cr9 | gmii1_txen | vin1a_d20 | pata_d12 | NA | uart5_txd_mux2 | NA | gpio3_19
name: vout1_vsync.vout1_vsync (0x48140b34/0xb34 = 0x0001), b NA, t NA
mode: OMAP_PIN_OUTPUT | OMAP_MUX_MODE1
signals: vout1_vsync | gmii1_crs | vin1_fid0 | vin1_de0 | spi3_d_0_mux2 | uart3_ctsn_mux1 | NA | gpio2_30
Best Regards,
Eunhye
