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timer0 is runaway in c6657

Jing Bai
Intellectual 650 points


hi everyone

I use the Timer_test example in the pdk6678/csl/example rebuilding it with c6657's csl.

I never got 10ms period which the code set because of CNTHI is runaway.

SYSCLKOUT is 166.7MHz, MDSTAT23 and MDCTL23 are 0x00001F03 and 0x00000103, so the power and internal source clock is already set I think.

Could please teach me why this problem happened?

Any help would be greatly appreciated.

Thank you in advance.

Bai

  • 0
    TI__Guru* 95265 points

    Bai,

    There are several test cases for timer, can you specify what test failed in your case? The test_high_single_shot_timer()? test_high_continuous_timer()? test_wd_timer()? Or you can attach a log from CCS CIO console to us understand the issue.

    Also, when create the CCS project for 6657 timer (using test code from 6678), please make sure the include path (ti\pdk_C6657_1_1_2_x\packages) and libraries linked are correct (ti\pdk_C6657_1_1_2_x\packages\ti\csl\lib\ti.csl.ae66 and ti.csl.intc).

    Did you try 6678 timer code with 6678 CSL, did it work?

    I used the 6678 timer code with 6657 CSL and I got the following:

    [C66xx_0] **************************************************

    ****************** Timer Testing ****************

    **************************************************

    Debug: Testing Low Timer (Unchained) in Single Shot Mode...

    Debug: Testing Low Timer (Unchained) in Single Shot Mode Passed

    Debug: Testing High Timer (Unchained) in Single Shot Mode...

    Debug: Testing High Timer (Unchained) in Single Shot Mode Passed

    Debug: Testing High Timer (Unchained) in Continuous Mode....

    Debug: Testing High Timer (Unchained) in Continuous Mode Passed

    Debug: Testing 64bit Timer in Single Shot Mode...

    Debug: Testing 64bit Timer in Single Shot Mode Passed

    Debug: Testing Timer (Chained) in Single Shot Mode....

    Debug: Testing Timer (Chained) in Single Shot Mode Passed

    Debug: Testing Watch Dog Timer...

    Regards, Eric