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ROM Status Code: 0x000000BF

Rob Tice1
Prodigy 70 points

Other Parts Discussed in Thread: OMAP-L138, OMAPL138

Hello All,

I am bringing up a custom board based on a OMAP-L138 and am having a few issues connecting via JTAG. I have the unit in Emulation Debug boot mode and have verified this via SYSCFG0 register. When I connect to the ARM it says the processor is Running. When I try to run a GEL file or pause the ARM processor I get the error:

ARM9_0: Trouble Halting Target CPU: Error 0x00000020/-2011 Error during: Execution,  An internal error occurred in which an illegal action (0x00000000) was requested while disconnected.

I can successfully connect to the DSP core and run certain parts of GEL files. If I try to change the PLL frequencies I get the error:

Trouble Reading Memory Block at 0xb0000008 on Page 0 of Length 0x4:
Error 0x00000002/-1202
Error during: Memory,

If I select yes and force the processor to stop accessing shared RAM I get the next error:

Trouble Reading Memory Block at 0x1840020 on Page 0 of Length 0x4:
Error 0x00000002/-1060

And then I have to disconnect from the JTAG and restart my computer to reconnect again. When I run a diagnostics test on the C674X I get the following:

C674X_0: GEL Output: ---------------------------------------------
C674X_0: GEL Output: | BOOTROM Info |
C674X_0: GEL Output: ---------------------------------------------
C674X_0: GEL Output: ROM ID: d800k176-47-48
C674X_0: GEL Output: Silicon Revision UNKNOWN
C674X_0: GEL Output: Boot pins: 30
C674X_0: GEL Output: Boot Mode: Emulation Debug
C674X_0: GEL Output:
ROM Status Code: 0x000000BF
Description:C674X_0: GEL Output: Error code not recognized

and then the rest of the register status's are printed. I assume there's an issue relating to the UNKNOWN Silicon Revision and the ROM Status code not recognized errors.  I would also assume, since I am in JTAG boot mode, that the ARM should not be running and should be sitting in Idle. Any help would be greatly appreciated.

Thanks,

Rob

  • 0
    Prodigy 70 points

    I have figured out my issue. I noticed when running the debug GEL file from the DSP core that the ARM core had not been woken up.

    C674X_0: GEL Output: Module 14: ARM                STATE = 0

    I loaded the DSP GEL file and woke the core and my issue has disappeared. 

    Thanks,

    Rob

  • 0 in reply to Rob Tice1
    TI__Guru** 116830 points

    Rob,

    I am a bit confused. OMAPL138 is an ARM boot device, the DSP doesn`t need to bring it out of reset using the GEL file. ARM should wake up and be in idle state for you to connect after POR in emulation mode. I suspect that you may have an hardware hook up issue. What is the silicon revision of the sample that you have on the custom platform.

    Regards,

    Rahul

  • 0 in reply to Rahul Prabhu
    Prodigy 70 points

    Hi Rahul,

    I am a bit confused also. I just posted this question:

    http://e2e.ti.com/support/dsp/omap_applications_processors/f/42/t/266682.aspx

    I would expect the DSP to wake the arm and then go back into reset with the arm in idle. This is not the case. It looks like the DSP is never doing this. I am using silicon revision 2.1. I scoped the reset, resetout, and trst lines on startup and they are behaving as expected. I'll have to verify the timing with a logic analyzer before confirming that it isn't a reset issue. Is there a way to tell if the PRU set the arm reset vectors? Let me know if any of the information from my other post is useful in determining what may be the issue. 

    Thanks,

    Rob