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TMS320C6657 DDR3 roting question.

Other Parts Discussed in Thread: TMDSEVM6657, TMS320C6657

Dear sirs

DDR3 Data group signal routing didn't respect DDR3 CLK length in TMDSEVM6657.

only DDR3 ADDRESS & COMMAND respect DDR3 CLK length.

I check TMS320C6657 DDR3 design guide(SPRABI1A—April 2011).

I think DDR3 Data group signal should respect DDR3 CLK.

why didn't DDR3 Data group signal follow DDR3 CLK length in EVM board.

any specail reason? or could you suggest how to routing for DDR3?

Thank you.

  • The DDR3 CLK is part of the address and command group and should be routed in the same fly-by manner. The DDR3 memory uses the clock to capture the address and the command. The data is clocked using the data strobe which is routed in the same manner as the data lines. For more information please see the DDR3 Design Requirements for KeyStone Devices application note.

    Regards, Bill

  •  

    I want to know data strobe and CLK relationship.

    I check spec it mean CLK must longer than data strobe and data strobe close to CLK.

    does any data strobe skew match request with CLK?

    Thank you.