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the question on size of linking RAM

zhang bei
Prodigy 20 points

Hi,

it is said that the QM uses 4*512KB memory if a total of 512K descriptors are supported. And Up to 4*16KB of this memory can be in the internal linking RAM for keystone I in QMSS LLD SDS. My questions are

1. is 4B here the entry size for every descritpors?

2. for KeystoneII, is it true that  up to 4*32KB memory can be in internal linking RAM?

3. In chapter 11.2 of this document, it said that each entry must be 64bit wide. it is comflict with my understanding on 1. is this requirement only for external linking RAM? is it still 4B for internal linking RAM?

Thank you.

  • 0
    TI__Intellectual 2180 points

    For internal linking RAM, the size in bytes is hidden from you.  The LLD always takes the size in descriptor entries, and if you set linkingRAM0Size to 0 (and linkingRAM0Base to 0) it will fully configure the internal linking RAM which supports 16K entries on K1.

    K2 is a little more confusing.  Since there are two separate QMs normally operated in joint mode, it uses twice the linking RAM.  Each QM gets its own.  Thus you still only support 16K descriptors in internal linking RAM in joint mode.

    The only time the *4 comes into play is if you want to "malloc" the memory for external linking RAM.  Otherwise, think number of descriptors.

  • 0 in reply to John Dowdal
    Prodigy 20 points

    Thanks for reply. For K2, there are two modes of Linking RAM configuration. I understood that it is a scenario of split mode you mentioned in reply. is it right?

    How about share mode? If I want to use share mode with linking RAM fully supports 32K entries in K2, does it need to set linkingRAM0Size to 0 and linkingRAM0Base to 0?