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Is a bug of the EDMA3 in omap-138 ? help :)

liang xu
Prodigy 50 points


     I'm  learning  how to move data by EDMA3 of omap-138 DSP, then I find a problem about the Edma3 completed interrupt:

     Usually，after edma3 completes, the bit correponding to TCC will appear in reg “IPR”.

     However a problem appears  :  when using omap-138, if the tcc number is same to the channel ID, the transfer and the completed interrupt is OK;

     If the tcc number is different to the channel ID,  the tranfer is succes, but the completed interrupt is abnormal: DSP can't run to ISR of edma3, and the value of IPR  is always 0.

     Is there some Bug in edma3 of omap-138? Thanks very much:)

  • 0
    TI__Mastermind 20790 points

    Liang xu,

    EDMA3 Interrupts are Transfer Completion Interrupt and Error Interrupts.

    The transfer completion code (TCC) value is directly mapped to the bits of the interrupt pending register (IPR).

    When a tranfer completion code is returned, the corresponding bit in IPR is set.

     The transfer completion code (TCC) can be programmed to any value for a DMA/QDMA channel.

     There does not need to be a direct relation between the channel number and the transfer completion code value.

    For more details about TCC, refer the TRM as below link, Section-EDMA3 Interrupts

    http://www.ti.com/lit/ug/spruh77a/spruh77a.pdf

    Regards,

    Pubesh

     

  • 0 in reply to Pubesh
    Prodigy 50 points

       Thanks very much, the problem has been resolved。

       It’s my fault , I forget to modify the DRAE reg, the operation of shadow region  is error。

       I‘m ashamed and thanks a lot！