3874 PCIe SERDES PLL Boot time Initialization

"Advisory 3.0.71 ROMCODE: PCIe Boot is Unstable"

says that the ROM doesn't wait long enough before locking the PLL.

1. What is meant by "extreme ends of the device operating ranges"? Voltage? Temperature?
2. What are the symptoms of the failure?
3. Can the process be repeated after the OS is running?