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AM335x USB

Jonathan Asher
Intellectual 290 points
Other Parts Discussed in Thread: AM3352

Section 16.3.2 of the TRM (Rev H) states that the required pull-up/pull-down resistors cannot exist external to the device.

We are trying to replace an older ARM920T SOC processor that has gone EOL with the AM3352. It appears we will be able to emulate all functionallity of the old part with the AM3352 except for the USB. The older part USB interface was OHCI 1.0 and the design has the pull-up/pull-down resistors integrated into EMI/RFI filters on a seperate motherboard(s) on which the processor card attaches. One port supports FS/LS downstream and the other is FS upstream. Upstream enumeration control is handled by GPIO.

HS operation is not required.

Would it be possible to over-ride the USB 2.0 UTMI interface to the PHY by using UTMI_INTERFACE_CTRL_2 register bits 16-13 to disable the pull-up/pull-down resistors at the PHY and still have the interfaces operational?

 

  • 0
    Prodigy 30 points

    Also,

    I need to get the base address for the USB2PHY registers, but I cannot find them anywhere. I checked the Technical Reference Manual and did not see it listed in the memory map section.

  • 0
    TI__Mastermind 27890 points

    Jonathan,

    I do not believe this is possible. These registers only control the PHY pulldowns and would not be able to control the pull-ups required to support device mode. I'll double check with design, but it may take several days to get a response given the US holiday on Monday.

  • 0 in reply to -DK-
    Intellectual 290 points

    DK,

    Its my thinking that when bit 16 is set in UTMI_INTERFACE_CTRL_2 then bits 13 and 14 will disable the pull-downs in the PHY regardless of the mode of operation of the PHY. In our Downstream application, these 15K pull-downs are external and the impedance should appear normal to the FS selection of Analog XCVR interface of the PHY.

    As for the Upstream pull-up control "TermSelect" bit 15 (with bit 16 set to a '1'), its functionality depends on the state of "XcvrSelect(1:0)" at the PHY. If XcvrSelect(1:0) is '01b' for FS mode Upstream operation by the UTMI interface then bit 15 could be used to control enumeration.

    According to the UTMI+ specification Rev 1.0 (pg. 25), if XcvrSelect(1) is a '0', then when "TermSelect" is set to a '1' a 1.5K pull-up is applied to DP, enumerating a FS device. If we leave "TermSelect = 0" then we should be able to externally control enumeration via a GPIO pin.

  • 0 in reply to Jonathan Asher
    TI__Mastermind 27890 points

    Jonathan,

    Here is what I got back from the designer:

    The controller drives the utmi interface.  The main mode signals are xcvrsel, termsel, opmode, and dp/dmpulldown.  It is possible to override termsel and dp/dmpulldown by the UTMI_INTERFACE_CNTL_2 register; but doing this would put the phy into some strange state and be out of sync with the controller.  I think the purpose of these overrides are for DC parametric testing not functional control. The controller is going to sequence through the utmi states in normal operating mode.  It would be impossible to time the appropriate overrides via the mmr with respect to the controller.  Something bad will probably happen. Maybe the link will hang?


    Your suggested solution may work, but it is not something that we would be able to support.