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EDMA3_DRV_requestChannel DM643x Want to request two specific QDMA channels - HOW?

Other Parts Discussed in Thread: CCSTUDIO

Discovered that DM6437 has 8 QDMA channels but can access only 1x with EDMA3 LLD.

When I apply bugfix to .cfg file to get 2x channels, this breaks existing application that also uses EDMA3.

( reference http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/99/t/7022.aspx )

QUESTION

How do get 2x channels without applying the above bugfix?

Can you provide a sample C line of code that calls EDMA3_DRV_requestChannel() with specific channel numbers

for 2 of the 8 channels in the DM6429?

I cannot change the BIO on this production code.

CCStudio 3.3.82.1 3

IDE 5.98.0.393

BIOS 5.41.10.36

COdeGenTools v7.2.7

Thanks!

Andrew

  • Andrew,

    You can request for a specific QDMA channel by passing the channel number between EDMA3_DRV_QDMA_CH_MIN_VAL and EDMA3_DRV_QDMA_CH_MAX_VAL.

    But that particular channel should be owned by the core.

    Regards,
    Prasad

  • I HAVE A WORKAROUND SOLUTION


    Bug in TI EDMA3 LLD.
    When requesting QMDA channel you must supply specific "TCC" values 30 and 31.

    SOLUTION - MORE DETAIL
    Do *not* use "EDMA3_DRV_TCC_ANY" or allow the TI driver to supply the TCC.
    The values 30 and 31 are "reserved", and are not available to the driver for allocation
    under the "EDMA3_DRV_TCC_ANY".
    The bitmasks
       EDMA3_DMA_CHANNEL_TO_EVENT_MAPPING_0
    EDMA3_DMA_CHANNEL_TO_EVENT_MAPPING_1
      have "0"'s where you can *** TCC.
     Do not pick a TCC that is used for an event in the table



    SOLUTION - MORE DETAIL

    1. in the "sample" config file:
       a) set aside quantity total two (2) more QDMA for "own"
       b) add quantity sixteen (16) more  PaRAM for "own" in range 127..64
       d) add quantity four (4) more DMA/TCC/  numbers 19,18,17,16 to driver
          ...  set map to "not mapped".
             This means the mask for "RESERVE" bit are set to "0"
               #define EDMA3_DMA_CHANNEL_TO_EVENT_MAPPING_0          0x33F0FFFCu   
    2. when allocCHANNEL() ... for QDMA specify "TCC"'s as 30 and 31
       These DMA/TCC's are currently

    DISCUSSION
    Bug in TI code allows RM to allocate QDMA and DMA resources twice.
    When a QDMA "any" request is made to RM with TCC "any", the returned TCC
    may subsequently match the channel number of a later  DMA returned with "any".
    This miss-match of a TCC for a QDMA being the same value as the DMA channel
    is observed to stop application from running.
    It is observed that in the working application the RM requests  result in
    DMA allocations where the returned DMA/PARAM/TCC numbers all match each other.
    Said a different way, in the working application the DMA equals the PARAM equals the TCC.
    When a QDMA is called with "any" and TCC "any", this breaks the DMA=PARAM=TCC in
    the subsequent DMA requests to the RM. application with calls QDMA and TCC "any" does not run.
    By asking the RM for a QDMA and providing fixed TCC values of 30 and 31, we
    do not break the condition of DMA=PARAM=TCC for all the subsequent DMA requests.
    Asking for QDMA with fixed TCC value of 30 and 31 works.
    The values of the TCC, in this case 30 and 31, need to be "reserved" in the
    EDMA3 LLD driver configuration file bios_edma3_drv_sample_dm643x_cfg.c
    This is done by having "0" in the bits matching the TCC value.


    QDMA
     - by default from TI, only 1x is "owned" by the driver from TI

    PARAM
     - by default from TI only 8x PaRAM are available for QDMA

    MIXED QDMA/EDMA
     - conflict occurs when you allcoate EDMA and QDMA "any" from the driver.