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RGMII direct connection to FPGA

Ran Kalif
Prodigy 10 points
Other Parts Discussed in Thread: AM3359

Hi all,

 

We are trying to connect the AM3359 to FPGA using a standard RGMII bus, and Sitare-Linux 5.06.00.00 OS. There is no MDIO connection between the CPU and the FPGA. The FPGA is configured as Duplex-Full, Speed -1 Gig, Link-Up. The FPGA sets all RGMII electrical signals to be standard compliant (timing) with the CPU.

However, since no MDIO port exists, the CPU doesn't recognize this port (ETH1).

How can we force the CPU activate ETH1 to Link-up, Duplex-Full, Speed-1000, without getting that information from the FPGA?

 

Thanks,

Ran Kalif.

  • 0
    TI__Mastermind 27890 points

    Ran,

    Direct MAC-to-MAC connections are not a supported configuration...based on your description I can't tell if you are emulating a PHY in FPGA or not.

    Forcing a specific connection can be done via the relevant (to the port) MACCONTROL register. Setting GMII_EN, GIG, and FULLDUPLEX should configure the MAC for your requested connection.