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[AM3715] DDR timing

Other Parts Discussed in Thread: AM3715

With AM3715, DDR timing is set with spreadsheet tool for the ac timing, as below link.

(http://processors.wiki.ti.com/index.php?title=Setting_up_AM37x_SDRC_registers#AC_timing_registers)

Because of the variation of mDDR device, sometimes the system shows error and becomes down.

So, is there any method which can do more adjustment of the connected DDR timing?


Thanks and regards,

Hayden

  • Hayden Kim said:

    Because of the variation of mDDR device, sometimes the system shows error and becomes down.

    So, is there any method which can do more adjustment of the connected DDR timing?

    When you mention variation of the mDDR device, are you referring to variation of a single device over operating conditions?  Or variation of different mDDR device part numbers from different manufacturers?

    The adjustments you have available supported by the AM3715 SDRC (DRAM controller) is limited to the AC timing register configuration bits which are constrained to DDR clock cycle resolution as well as drive strength of the SDRC I/Os.

  • It means, single device.

    Sorry, I confused.

  • Sorry, I confused.

    It means, variation of mDDR devices which all have same part number.

    After swapping mDDR device, the system operates normally.

    And, the mDDR device which showed the system error, was checked that the device itself did not have problem.


    Best regards,

    Hayden

  • Two things come to mind.

    1) A manufacturing issue that is healed by replacing the mDDR device.

    2) The configuration registers for the timing paramters are marginal which works with some devices and not others.

  • Team,

    I (customer) have one more question.

    If the mDDR device is suspected as a corner sample, how to check/test with varing the timing value?

    Is there any guide of how to?

    Or, is there any tool of doing like auto-leveling of the mDDR timing?


    Thanks and regards,

    Hayden

  • Hayden Kim said:

    If the mDDR device is suspected as a corner sample, how to check/test with varing the timing value?

    Is there any guide of how to?

    Not really.  However, if marginality is suspected, I would highly suggest ensuring the timing configuration registers account for the min/max timing conditions.  Then, the customer needs to perform testing across temperature conditions, etc.

    Hayden Kim said:

    Or, is there any tool of doing like auto-leveling of the mDDR timing?

    Not that I am aware of.

  • With regarding mDDR fail issue, customer is checking with changing Drive Strength from "full" to "1/2". (there is no termination at data lines)

    It seems that with half DS, the system hang did not occur.


    [Q1] Can this issue have relation with Drive Strength setting?

    [Q2] According to the TRM of AM37x, below DS related setting is present.


    What is the meaning of "Equivalent load capacitance range"? Can you explain about the meaning?


    Thanks and regards,

    Hayden

  • Hayden Kim said:

    With regarding mDDR fail issue, customer is checking with changing Drive Strength from "full" to "1/2". (there is no termination at data lines)

    It seems that with half DS, the system hang did not occur.


    [Q1] Can this issue have relation with Drive Strength setting?

    This seems possible, especially if there is no termination on the signals.


    Hayden Kim said:

    [Q2] According to the TRM of AM37x, below DS related setting is present.


    What is the meaning of "Equivalent load capacitance range"? Can you explain about the meaning?

    This is the equivalent load capacitance as seen by the AM3715's SDRC pins which would include board parasitics, the input loading of the mDDR memory, etc.